Add support for binary encoding of ARM 'adr' instructions referencing constant

pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.

llvm-svn: 120635

2 files changed, 9 insertions, 3 deletions

diff --git a/llvm/lib/MC/ELFObjectWriter.cpp b/llvm/lib/MC/ELFObjectWriter.cpp
index 1bad8ebaf8a..67907c7d8bf 100644
--- a/llvm/lib/MC/ELFObjectWriter.cpp
+++ b/llvm/lib/MC/ELFObjectWriter.cpp
@@ -408,7 +408,7 @@ namespace {
       case FK_PCRel_1:
       case FK_PCRel_2:
       case FK_PCRel_4:
-      case ARM::fixup_arm_pcrel_12:
+      case ARM::fixup_arm_ldst_pcrel_12:
       case ARM::fixup_arm_pcrel_10:
       case ARM::fixup_arm_branch:
         return true;
@@ -1456,8 +1456,9 @@ unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
   } else {
     switch ((unsigned)Fixup.getKind()) {
     default: llvm_unreachable("invalid fixup kind!");
-    case ARM::fixup_arm_pcrel_12:
+    case ARM::fixup_arm_ldst_pcrel_12:
     case ARM::fixup_arm_pcrel_10:
+    case ARM::fixup_arm_adr_pcrel_12:
       assert(0 && "Unimplemented"); break;
     case ARM::fixup_arm_branch:
       return ELF::R_ARM_CALL; break;
diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index 45d2ff74912..60b38dc5211 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -31,7 +31,12 @@ using namespace llvm::object;
 // FIXME: this has been copied from (or to) X86AsmBackend.cpp
 static unsigned getFixupKindLog2Size(unsigned Kind) {
   switch (Kind) {
-  default: llvm_unreachable("invalid fixup kind!");
+  // FIXME: Until ARM has it's own relocation stuff spun off, it comes
+  // through here and we don't want it to puke all over. Any reasonable
+  // values will only come when ARM relocation support gets added, at which
+  // point this will be X86 only again and the llvm_unreachable can be
+  // re-enabled.
+  default: return 0;// llvm_unreachable("invalid fixup kind!");
   case FK_PCRel_1:
   case FK_Data_1: return 0;
   case FK_PCRel_2: