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| author | Sander de Smalen <sander.desmalen@arm.com> | 2018-07-04 08:50:49 +0000 |
|---|---|---|
| committer | Sander de Smalen <sander.desmalen@arm.com> | 2018-07-04 08:50:49 +0000 |
| commit | e31e6d46dd634f25352987caae5a2bfea1f73975 (patch) | |
| tree | ada4c436b165d3cc69900aec362a562d4e5972bb /llvm/lib/Demangle/ItaniumDemangle.cpp | |
| parent | a2d582563dcbefdca27c3fa23541438fb1830504 (diff) | |
| download | bcm5719-llvm-e31e6d46dd634f25352987caae5a2bfea1f73975.tar.gz bcm5719-llvm-e31e6d46dd634f25352987caae5a2bfea1f73975.zip | |
[AArch64][SVE] Asm: Support for SVE condition code aliases
SVE overloads the AArch64 PSTATE condition flags and introduces
a set of condition code aliases for the assembler. The
details are described in section 2.2 of the architecture
reference manual supplement for SVE.
In short:
SVE alias => AArch64 name
--------------------------
NONE => EQ
ANY => NE
NLAST => HS
LAST => LO
FIRST => MI
NFRST => PL
PMORE => HI
PLAST => LS
TCONT => GE
TSTOP => LT
Reviewers: rengolin, fhahn, SjoerdMeijer, samparker, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D48869
llvm-svn: 336245
Diffstat (limited to 'llvm/lib/Demangle/ItaniumDemangle.cpp')
0 files changed, 0 insertions, 0 deletions
