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authorChad Rosier <mcrosier@codeaurora.org>2014-06-27 21:05:09 +0000
committerChad Rosier <mcrosier@codeaurora.org>2014-06-27 21:05:09 +0000
commit5235973ee03aca4148ecabe5eff64da2af1e034e (patch)
treed08f616645e540e476c00a9a1c957bd75b11428b /llvm/lib/CodeGen
parent035fcf711534a1988d4d22fa3e273c7f8d7e5c31 (diff)
downloadbcm5719-llvm-5235973ee03aca4148ecabe5eff64da2af1e034e.tar.gz
bcm5719-llvm-5235973ee03aca4148ecabe5eff64da2af1e034e.zip
[AArch64] Fix memset ICE when memset value is f128.
llvm-svn: 211960
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 522d7c535d3..4aad5dcfc4c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3631,7 +3631,7 @@ static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
if (Str.empty()) {
if (VT.isInteger())
return DAG.getConstant(0, VT);
- else if (VT == MVT::f32 || VT == MVT::f64)
+ else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
return DAG.getConstantFP(0.0, VT);
else if (VT.isVector()) {
unsigned NumElts = VT.getVectorNumElements();
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