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| author | Geoff Berry <gberry@codeaurora.org> | 2017-12-12 17:53:59 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2017-12-12 17:53:59 +0000 |
| commit | 60c431022ec7f4d287302691a1ef5706315f7aac (patch) | |
| tree | 0cb7d0621c8426dc443e67afc9073eca6317e7d1 /llvm/lib/CodeGen/VirtRegMap.cpp | |
| parent | 10bcc1cf90de105d0511f3d5616ceaa3195c6f36 (diff) | |
| download | bcm5719-llvm-60c431022ec7f4d287302691a1ef5706315f7aac.tar.gz bcm5719-llvm-60c431022ec7f4d287302691a1ef5706315f7aac.zip | |
[MachineOperand][MIR] Add isRenamable to MachineOperand.
Summary:
Add isRenamable() predicate to MachineOperand. This predicate can be
used by machine passes after register allocation to determine whether it
is safe to rename a given register operand. Register operands that
aren't marked as renamable may be required to be assigned their current
register to satisfy constraints that are not captured by the machine
IR (e.g. ABI or ISA constraints).
Reviewers: qcolombet, MatzeB, hfinkel
Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D39400
llvm-svn: 320503
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegMap.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/VirtRegMap.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp index 6e5674bb8bc..00a4eb7808f 100644 --- a/llvm/lib/CodeGen/VirtRegMap.cpp +++ b/llvm/lib/CodeGen/VirtRegMap.cpp @@ -530,6 +530,7 @@ void VirtRegRewriter::rewrite() { // Rewrite. Note we could have used MachineOperand::substPhysReg(), but // we need the inlining here. MO.setReg(PhysReg); + MO.setIsRenamableIfNoExtraRegAllocReq(); } // Add any missing super-register kills after rewriting the whole |
