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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-06-02 18:37:21 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-06-02 18:37:21 +0000
commit50451d49fcc9dee4987182fadea967a2a4688a30 (patch)
tree9c3b2290c686d4f631782695cca6180f8b9c707b /llvm/lib/CodeGen/VirtRegMap.cpp
parent8e00194be8cd1c20ee625b0adcb4fe5981301118 (diff)
downloadbcm5719-llvm-50451d49fcc9dee4987182fadea967a2a4688a30.tar.gz
bcm5719-llvm-50451d49fcc9dee4987182fadea967a2a4688a30.zip
Use false for bool instead of 0
llvm-svn: 271562
Diffstat (limited to 'llvm/lib/CodeGen/VirtRegMap.cpp')
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index c064fd51b9b..7713adb3c7b 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -82,7 +82,7 @@ unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
bool VirtRegMap::hasPreferredPhys(unsigned VirtReg) {
unsigned Hint = MRI->getSimpleHint(VirtReg);
if (!Hint)
- return 0;
+ return false;
if (TargetRegisterInfo::isVirtualRegister(Hint))
Hint = getPhys(Hint);
return getPhys(VirtReg) == Hint;
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