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author | Craig Topper <craig.topper@intel.com> | 2019-03-05 18:54:38 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-03-05 18:54:38 +0000 |
commit | 2982b846e9203bd9351c922332d36e9ed4a61d99 (patch) | |
tree | 23564ee382c5def980669a101d95b0435a439a99 /llvm/lib/CodeGen/TargetSubtargetInfo.cpp | |
parent | f124e75656dd926d10e805f802e57eb9f7f6d4c5 (diff) | |
download | bcm5719-llvm-2982b846e9203bd9351c922332d36e9ed4a61d99.tar.gz bcm5719-llvm-2982b846e9203bd9351c922332d36e9ed4a61d99.zip |
[Subtarget] Merge ProcSched and ProcDesc arrays in MCSubtargetInfo into a single array.
These arrays are both keyed by CPU name and go into the same tablegenerated file. Merge them so we only need to store keys once.
This also removes a weird space saving quirk where we used the ProcDesc.size() to create to build an ArrayRef for ProcSched.
Differential Revision: https://reviews.llvm.org/D58939
llvm-svn: 355431
Diffstat (limited to 'llvm/lib/CodeGen/TargetSubtargetInfo.cpp')
-rw-r--r-- | llvm/lib/CodeGen/TargetSubtargetInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp index c0520a9b2ba..59eb2f9c88c 100644 --- a/llvm/lib/CodeGen/TargetSubtargetInfo.cpp +++ b/llvm/lib/CodeGen/TargetSubtargetInfo.cpp @@ -17,10 +17,10 @@ using namespace llvm; TargetSubtargetInfo::TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetSubTypeKV> PD, - const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, + const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) - : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) { + : MCSubtargetInfo(TT, CPU, FS, PF, PD, WPR, WL, RA, IS, OC, FP) { } TargetSubtargetInfo::~TargetSubtargetInfo() = default; |