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| author | Andrew Trick <atrick@apple.com> | 2013-06-17 21:45:18 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-06-17 21:45:18 +0000 |
| commit | 5d4861867adc86776f6674f1bf0d6e1891119d68 (patch) | |
| tree | 8ef1d542d4b0e4bafaf88e2b1b901347b1fc64f0 /llvm/lib/CodeGen/TargetSchedule.cpp | |
| parent | 3296a5c8080220920c678cd0b620b6a60688a05b (diff) | |
| download | bcm5719-llvm-5d4861867adc86776f6674f1bf0d6e1891119d68.tar.gz bcm5719-llvm-5d4861867adc86776f6674f1bf0d6e1891119d68.zip | |
MI-Sched: handle ReadAdvance latencies as used by Swift.
llvm-svn: 184135
Diffstat (limited to 'llvm/lib/CodeGen/TargetSchedule.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/TargetSchedule.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TargetSchedule.cpp b/llvm/lib/CodeGen/TargetSchedule.cpp index 53cd11c5daa..64ee9d1c464 100644 --- a/llvm/lib/CodeGen/TargetSchedule.cpp +++ b/llvm/lib/CodeGen/TargetSchedule.cpp @@ -201,7 +201,10 @@ unsigned TargetSchedModel::computeOperandLatency( if (UseDesc->NumReadAdvanceEntries == 0) return Latency; unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); - return Latency - STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); + int Advance = STI->getReadAdvanceCycles(UseDesc, UseIdx, WriteID); + if (Advance > 0 && (unsigned)Advance > Latency) // unsigned wrap + return 0; + return Latency - Advance; } // If DefIdx does not exist in the model (e.g. implicit defs), then return // unit latency (defaultDefLatency may be too conservative). |
