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authorMark Lacey <mark.lacey@apple.com>2013-08-14 23:50:16 +0000
committerMark Lacey <mark.lacey@apple.com>2013-08-14 23:50:16 +0000
commit9d8103de7ace78b609c3320244f38240c1299374 (patch)
tree50b186c1cbb8d07b97b50aa34b684059c4984a3a /llvm/lib/CodeGen/Spiller.cpp
parentc3f912b945ce6813e874b7a11c29ea2b3f2b54ff (diff)
downloadbcm5719-llvm-9d8103de7ace78b609c3320244f38240c1299374.tar.gz
bcm5719-llvm-9d8103de7ace78b609c3320244f38240c1299374.zip
Auto-compute live intervals on demand.
When new virtual registers are created during splitting/spilling, defer creation of the live interval until we need to use the live interval. Along with the recent commits to notify LiveRangeEdit when new virtual registers are created, this makes it possible for functions like TargetInstrInfo::loadRegFromStackSlot() and TargetInstrInfo::storeRegToStackSlot() to create multiple virtual registers as part of the process of generating loads/stores for different register classes, and then have the live intervals for those new registers computed when they are needed. llvm-svn: 188437
Diffstat (limited to 'llvm/lib/CodeGen/Spiller.cpp')
-rw-r--r--llvm/lib/CodeGen/Spiller.cpp31
1 files changed, 11 insertions, 20 deletions
diff --git a/llvm/lib/CodeGen/Spiller.cpp b/llvm/lib/CodeGen/Spiller.cpp
index 209792fd407..d72c596a842 100644
--- a/llvm/lib/CodeGen/Spiller.cpp
+++ b/llvm/lib/CodeGen/Spiller.cpp
@@ -115,15 +115,14 @@ protected:
indices.push_back(i);
}
- // Create a new vreg & interval for this instr.
- LiveInterval *newLI = &LRE.create();
- newLI->weight = HUGE_VALF;
+ // Create a new virtual register for the load and/or store.
+ unsigned NewVReg = LRE.create();
// Update the reg operands & kill flags.
for (unsigned i = 0; i < indices.size(); ++i) {
unsigned mopIdx = indices[i];
MachineOperand &mop = mi->getOperand(mopIdx);
- mop.setReg(newLI->reg);
+ mop.setReg(NewVReg);
if (mop.isUse() && !mi->isRegTiedToDefOperand(mopIdx)) {
mop.setIsKill(true);
}
@@ -133,28 +132,20 @@ protected:
// Insert reload if necessary.
MachineBasicBlock::iterator miItr(mi);
if (hasUse) {
- tii->loadRegFromStackSlot(*mi->getParent(), miItr, newLI->reg, ss, trc,
+ MachineInstrSpan MIS(miItr);
+
+ tii->loadRegFromStackSlot(*mi->getParent(), miItr, NewVReg, ss, trc,
tri);
- MachineInstr *loadInstr(prior(miItr));
- SlotIndex loadIndex =
- lis->InsertMachineInstrInMaps(loadInstr).getRegSlot();
- SlotIndex endIndex = loadIndex.getNextIndex();
- VNInfo *loadVNI =
- newLI->getNextValue(loadIndex, lis->getVNInfoAllocator());
- newLI->addRange(LiveRange(loadIndex, endIndex, loadVNI));
+ lis->InsertMachineInstrRangeInMaps(MIS.begin(), miItr);
}
// Insert store if necessary.
if (hasDef) {
- tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr),newLI->reg,
+ MachineInstrSpan MIS(miItr);
+
+ tii->storeRegToStackSlot(*mi->getParent(), llvm::next(miItr), NewVReg,
true, ss, trc, tri);
- MachineInstr *storeInstr(llvm::next(miItr));
- SlotIndex storeIndex =
- lis->InsertMachineInstrInMaps(storeInstr).getRegSlot();
- SlotIndex beginIndex = storeIndex.getPrevIndex();
- VNInfo *storeVNI =
- newLI->getNextValue(beginIndex, lis->getVNInfoAllocator());
- newLI->addRange(LiveRange(beginIndex, storeIndex, storeVNI));
+ lis->InsertMachineInstrRangeInMaps(llvm::next(miItr), MIS.end());
}
}
}
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