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| author | Evan Cheng <evan.cheng@apple.com> | 2007-12-06 00:01:56 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2007-12-06 00:01:56 +0000 |
| commit | 7fc1d98353efa7bf8cbe474179b66741d068c716 (patch) | |
| tree | 2f708fcde4e4772a74e583a3ece425b9cbeb3cc7 /llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | d3d8017bcbe16aa5f820029fb9597b2f014381c8 (diff) | |
| download | bcm5719-llvm-7fc1d98353efa7bf8cbe474179b66741d068c716.tar.gz bcm5719-llvm-7fc1d98353efa7bf8cbe474179b66741d068c716.zip | |
Fix for PR1831: if all defs of an interval are re-materializable, then it's a preferred spill candiate.
llvm-svn: 44644
Diffstat (limited to 'llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 3d2669becd4..6eec5ab885c 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -1485,6 +1485,20 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) { // it and hope it will be easier to allocate for this li. if (isZeroLengthInterval(&LI)) LI.weight = HUGE_VALF; + else { + bool isLoad = false; + if (li_->isReMaterializable(LI, isLoad)) { + // If all of the definitions of the interval are re-materializable, + // it is a preferred candidate for spilling. If non of the defs are + // loads, then it's potentially very cheap to re-materialize. + // FIXME: this gets much more complicated once we support non-trivial + // re-materialization. + if (isLoad) + LI.weight *= 0.9F; + else + LI.weight *= 0.5F; + } + } // Slightly prefer live interval that has been assigned a preferred reg. if (LI.preference) |

