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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 21:00:03 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-04-04 21:00:03 +0000 |
| commit | 2e85396509ee061f91f269f8ef3d42c6d2db0664 (patch) | |
| tree | ed8033cef04743abee55ff5839444e79f60d7ad8 /llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | |
| parent | 8de5ca72e364dfe5fa55c850aa7869d6948b767e (diff) | |
| download | bcm5719-llvm-2e85396509ee061f91f269f8ef3d42c6d2db0664.tar.gz bcm5719-llvm-2e85396509ee061f91f269f8ef3d42c6d2db0664.zip | |
Allow coalescing with reserved physregs in certain cases:
When a virtual register has a single value that is defined as a copy of a
reserved register, permit that copy to be joined. These virtual register are
usually copies of the stack pointer:
%vreg75<def> = COPY %ESP; GR32:%vreg75
MOV32mr %vreg75, 1, %noreg, 0, %noreg, %vreg74<kill>
MOV32mi %vreg75, 1, %noreg, 8, %noreg, 0
MOV32mi %vreg75<kill>, 1, %noreg, 4, %noreg, 0
CALLpcrel32 ...
Coalescing these virtual registers early decreases register pressure.
Previously, they were coalesced by RALinScan::attemptTrivialCoalescing after
register allocation was completed.
The lower register pressure causes the mcinst-lowering-cmp0.ll test case to fail
because it depends on linear scan spilling a particular register.
I am deleting 2008-08-05-SpillerBug.ll because it is counting the number of
instructions emitted, and its revision history shows the 'correct' count being
edited many times.
llvm-svn: 128845
Diffstat (limited to 'llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp index 93aa0a31207..c621726a03f 100644 --- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -919,13 +919,23 @@ SimpleRegisterCoalescing::ShortenDeadCopySrcLiveRange(LiveInterval &li, /// are not spillable! If the destination interval uses are far away, think /// twice about coalescing them! bool SimpleRegisterCoalescing::shouldJoinPhys(CoalescerPair &CP) { + bool Allocatable = li_->isAllocatable(CP.getDstReg()); + LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg()); + + /// Always join simple intervals that are defined by a single copy from a + /// reserved register. This doesn't increase register pressure, so it is + /// always beneficial. + if (!Allocatable && CP.isFlipped() && JoinVInt.containsOneValue()) + return true; + if (DisablePhysicalJoin) { DEBUG(dbgs() << "\tPhysreg joins disabled.\n"); return false; } - // Only coalesce to allocatable physreg. - if (!li_->isAllocatable(CP.getDstReg())) { + // Only coalesce to allocatable physreg, we don't want to risk modifying + // reserved registers. + if (!Allocatable) { DEBUG(dbgs() << "\tRegister is an unallocatable physreg.\n"); return false; // Not coalescable. } @@ -944,8 +954,6 @@ bool SimpleRegisterCoalescing::shouldJoinPhys(CoalescerPair &CP) { // FIXME: Why are we skipping this test for partial copies? // CodeGen/X86/phys_subreg_coalesce-3.ll needs it. if (!CP.isPartial()) { - LiveInterval &JoinVInt = li_->getInterval(CP.getSrcReg()); - const TargetRegisterClass *RC = mri_->getRegClass(CP.getSrcReg()); unsigned Threshold = allocatableRCRegs_[RC].count() * 2; unsigned Length = li_->getApproximateInstructionCount(JoinVInt); |

