summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2008-04-29 01:41:44 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-04-29 01:41:44 +0000
commit11b98b6612e8eb3092be6c1333ae9b44978ca73e (patch)
tree2c82982deb6a9f341c9c710a4a792305c0511c74 /llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
parent586216e5bba80cd88da4607fd3d3c25c9e585252 (diff)
downloadbcm5719-llvm-11b98b6612e8eb3092be6c1333ae9b44978ca73e.tar.gz
bcm5719-llvm-11b98b6612e8eb3092be6c1333ae9b44978ca73e.zip
Another extract_subreg coalescing bug.
e.g. vr1024<2> extract_subreg vr1025, 2 If vr1024 do not have the same register class as vr1025, it's not safe to coalesce this away. For example, vr1024 might be a GPR32 while vr1025 might be a GPR64. llvm-svn: 50385
Diffstat (limited to 'llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp')
-rw-r--r--llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp4
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 3ea35c6eab2..6a110f0b87d 100644
--- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -942,9 +942,11 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
unsigned OldSubIdx = isExtSubReg ? CopyMI->getOperand(0).getSubReg()
: CopyMI->getOperand(2).getSubReg();
if (OldSubIdx) {
- if (OldSubIdx == SubIdx)
+ if (OldSubIdx == SubIdx && !differingRegisterClasses(SrcReg, DstReg))
// r1024<2> = EXTRACT_SUBREG r1025, 2. Then r1024 has already been
// coalesced to a larger register so the subreg indices cancel out.
+ // Also check if the other larger register is of the same register
+ // class as the would be resulting register.
SubIdx = 0;
else {
DOUT << "\t Sub-register indices mismatch.\n";
OpenPOWER on IntegriCloud