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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 17:24:15 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-09-14 17:24:15 +0000 |
| commit | e8e0f5cac6d80b489e58a369a5389387ff91d60a (patch) | |
| tree | 88f45d7f6dd53509e9a47978a841322cef0dc665 /llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | |
| parent | a2b036e88b8f31c4a2169c1d5634e21c9c8eb927 (diff) | |
| download | bcm5719-llvm-e8e0f5cac6d80b489e58a369a5389387ff91d60a.tar.gz bcm5719-llvm-e8e0f5cac6d80b489e58a369a5389387ff91d60a.zip | |
Make analyzeBranch family of instruction names consistent
analyzeBranch was renamed to use lowercase first, rename
the related set to match.
llvm-svn: 281506
Diffstat (limited to 'llvm/lib/CodeGen/SelectionDAG/FastISel.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index d25ea4e72eb..5d02fc32b05 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1446,7 +1446,7 @@ void FastISel::fastEmitBranch(MachineBasicBlock *MSucc, // fall-through case, which needs no instructions. } else { // The unconditional branch case. - TII.InsertBranch(*FuncInfo.MBB, MSucc, nullptr, + TII.insertBranch(*FuncInfo.MBB, MSucc, nullptr, SmallVector<MachineOperand, 0>(), DbgLoc); } if (FuncInfo.BPI) { |
