summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
diff options
context:
space:
mode:
authorChad Rosier <mcrosier@apple.com>2012-10-30 19:11:54 +0000
committerChad Rosier <mcrosier@apple.com>2012-10-30 19:11:54 +0000
commit9e1274fb4825e3e68f4bff2d32ab742932caa9f0 (patch)
tree923aa1c2cf3a64a457fcab1b5a5192d7bea6b25d /llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
parent8e50aba5f9734f7a083b6425b46cbc008e9ef0d0 (diff)
downloadbcm5719-llvm-9e1274fb4825e3e68f4bff2d32ab742932caa9f0.tar.gz
bcm5719-llvm-9e1274fb4825e3e68f4bff2d32ab742932caa9f0.zip
[inline asm] Implement mayLoad and mayStore for inline assembly. In general,
the MachineInstr MayLoad/MayLoad flags are based on the tablegen implementation. For inline assembly, however, we need to compute these based on the constraints. Revert r166929 as this is no longer needed, but leave the test case in place. rdar://12033048 and PR13504 llvm-svn: 167040
Diffstat (limited to 'llvm/lib/CodeGen/ScheduleDAGInstrs.cpp')
-rw-r--r--llvm/lib/CodeGen/ScheduleDAGInstrs.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index 8ea0f8a3eac..496473d3a4b 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -420,11 +420,6 @@ void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) {
/// Return true if MI is an instruction we are unable to reason about
/// (like a call or something with unmodeled side effects).
static inline bool isGlobalMemoryObject(AliasAnalysis *AA, MachineInstr *MI) {
- if (MI->isInlineAsm()) {
- // Until we can tell if an inline assembly instruction accesses
- // memory, we must assume all such instructions do so.
- return true;
- }
if (MI->isCall() || MI->hasUnmodeledSideEffects() ||
(MI->hasOrderedMemoryRef() &&
(!MI->mayLoad() || !MI->isInvariantLoad(AA))))
OpenPOWER on IntegriCloud