summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/ScheduleDAG.cpp
diff options
context:
space:
mode:
authorDan Gohman <gohman@apple.com>2009-01-15 19:20:50 +0000
committerDan Gohman <gohman@apple.com>2009-01-15 19:20:50 +0000
commit619ef48a5211ac7540dd32df4f3b4392c0b6aaa4 (patch)
tree72b8ec060e856b84b9cca3c57f5708d304480a4a /llvm/lib/CodeGen/ScheduleDAG.cpp
parente53c036d85e9b504fa1af62223999777f30c942b (diff)
downloadbcm5719-llvm-619ef48a5211ac7540dd32df4f3b4392c0b6aaa4.tar.gz
bcm5719-llvm-619ef48a5211ac7540dd32df4f3b4392c0b6aaa4.zip
Move a few containers out of ScheduleDAGInstrs::BuildSchedGraph
and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. llvm-svn: 62275
Diffstat (limited to 'llvm/lib/CodeGen/ScheduleDAG.cpp')
-rw-r--r--llvm/lib/CodeGen/ScheduleDAG.cpp22
1 files changed, 13 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/ScheduleDAG.cpp b/llvm/lib/CodeGen/ScheduleDAG.cpp
index 62b816c1472..7bad67fde40 100644
--- a/llvm/lib/CodeGen/ScheduleDAG.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAG.cpp
@@ -21,14 +21,13 @@
#include <climits>
using namespace llvm;
-ScheduleDAG::ScheduleDAG(SelectionDAG *dag, MachineBasicBlock *bb,
- const TargetMachine &tm)
- : DAG(dag), BB(bb), TM(tm), MRI(BB->getParent()->getRegInfo()) {
- TII = TM.getInstrInfo();
- MF = BB->getParent();
- TRI = TM.getRegisterInfo();
- TLI = TM.getTargetLowering();
- ConstPool = MF->getConstantPool();
+ScheduleDAG::ScheduleDAG(MachineFunction &mf)
+ : DAG(0), BB(0), TM(mf.getTarget()),
+ TII(TM.getInstrInfo()),
+ TRI(TM.getRegisterInfo()),
+ TLI(TM.getTargetLowering()),
+ MF(mf), MRI(mf.getRegInfo()),
+ ConstPool(MF.getConstantPool()) {
}
ScheduleDAG::~ScheduleDAG() {}
@@ -46,7 +45,12 @@ void ScheduleDAG::dumpSchedule() const {
/// Run - perform scheduling.
///
-void ScheduleDAG::Run() {
+void ScheduleDAG::Run(SelectionDAG *dag, MachineBasicBlock *bb) {
+ SUnits.clear();
+ Sequence.clear();
+ DAG = dag;
+ BB = bb;
+
Schedule();
DOUT << "*** Final schedule ***\n";
OpenPOWER on IntegriCloud