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authorNick Lewycky <nicholas@mxc.ca>2011-03-25 06:04:26 +0000
committerNick Lewycky <nicholas@mxc.ca>2011-03-25 06:04:26 +0000
commitd73218e4a37afba6f05789ee7b991d40b90ca72e (patch)
treee238a519237116d1c44768da0775d35d4e01426a /llvm/lib/CodeGen/RegAllocLinearScan.cpp
parenta1e3156ebdcd2a65b90d2e4f8c73109c1cefaaae (diff)
downloadbcm5719-llvm-d73218e4a37afba6f05789ee7b991d40b90ca72e.tar.gz
bcm5719-llvm-d73218e4a37afba6f05789ee7b991d40b90ca72e.zip
No functionality change. Fix up some whitespace and switch out "" for '' when
printing a single character. llvm-svn: 128256
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocLinearScan.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
index 8ee10645ff7..966570f3f33 100644
--- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp
@@ -375,7 +375,7 @@ namespace {
dbgs() << str << " intervals:\n";
for (; i != e; ++i) {
- dbgs() << "\t" << *i->first << " -> ";
+ dbgs() << '\t' << *i->first << " -> ";
unsigned reg = i->first->reg;
if (TargetRegisterInfo::isVirtualRegister(reg))
@@ -390,7 +390,7 @@ namespace {
}
INITIALIZE_PASS_BEGIN(RALinScan, "linearscan-regalloc",
- "Linear Scan Register Allocator", false, false)
+ "Linear Scan Register Allocator", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
INITIALIZE_PASS_DEPENDENCY(StrongPHIElimination)
INITIALIZE_PASS_DEPENDENCY(CalculateSpillWeights)
@@ -401,7 +401,7 @@ INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
INITIALIZE_AG_DEPENDENCY(RegisterCoalescer)
INITIALIZE_AG_DEPENDENCY(AliasAnalysis)
INITIALIZE_PASS_END(RALinScan, "linearscan-regalloc",
- "Linear Scan Register Allocator", false, false)
+ "Linear Scan Register Allocator", false, false)
void RALinScan::ComputeRelatedRegClasses() {
// First pass, add all reg classes to the union, and determine at least one
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