diff options
author | Jim Grosbach <grosbach@apple.com> | 2010-09-01 21:34:41 +0000 |
---|---|---|
committer | Jim Grosbach <grosbach@apple.com> | 2010-09-01 21:34:41 +0000 |
commit | 9dce31438d0209a9ca224b884754e352485a1871 (patch) | |
tree | a3368612a62cd8f4ea8900d62762e51490a9bed7 /llvm/lib/CodeGen/RegAllocLinearScan.cpp | |
parent | b070ddf6b41f4342d6c5ed31ff92f64771e9a961 (diff) | |
download | bcm5719-llvm-9dce31438d0209a9ca224b884754e352485a1871.tar.gz bcm5719-llvm-9dce31438d0209a9ca224b884754e352485a1871.zip |
cleanup per feedback. use a helper function for getting the first non-reserved
physical register in a register class. Make sure to assert if the register
class is empty.
llvm-svn: 112743
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocLinearScan.cpp | 31 |
1 files changed, 14 insertions, 17 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp index a667f97a4e8..23ec2d76769 100644 --- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp +++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp @@ -336,6 +336,17 @@ namespace { SmallVector<unsigned, 256> &inactiveCounts, bool SkipDGRegs); + /// getFirstNonReservedPhysReg - return the first non-reserved physical + /// register in the register class. + unsigned getFirstNonReservedPhysReg(const TargetRegisterClass *RC) { + TargetRegisterClass::iterator aoe = RC->allocation_order_end(*mf_); + TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_); + while (i != aoe && reservedRegs_.test(*i)) + ++i; + assert(i != aoe && "All registers reserved?!"); + return *i; + } + void ComputeRelatedRegClasses(); template <typename ItTy> @@ -951,14 +962,8 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { const TargetRegisterClass *RC = mri_->getRegClass(cur->reg); if (cur->empty()) { unsigned physReg = vrm_->getRegAllocPref(cur->reg); - if (!physReg) { - TargetRegisterClass::iterator aoe = RC->allocation_order_end(*mf_); - TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_); - while (reservedRegs_.test(*i) && i != aoe) - ++i; - assert(i != aoe && "All registers reserved?!"); - physReg = *i; - } + if (!physReg) + physReg = getFirstNonReservedPhysReg(RC); DEBUG(dbgs() << tri_->getName(physReg) << '\n'); // Note the register is not really in use. vrm_->assignVirt2Phys(cur->reg, physReg); @@ -1168,15 +1173,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { minWeight = RegsWeights[0].second; if (minWeight == HUGE_VALF) { // All registers must have inf weight. Just grab one! - if (BestPhysReg == 0) { - TargetRegisterClass::iterator aoe = RC->allocation_order_end(*mf_); - TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_); - while (reservedRegs_.test(*i) && i != aoe) - ++i; - assert(i != aoe && "All registers reserved?!"); - minReg = *i; - } else - minReg = BestPhysReg; + minReg = BestPhysReg ? BestPhysReg : getFirstNonReservedPhysReg(RC); if (cur->weight == HUGE_VALF || li_->getApproximateInstructionCount(*cur) == 0) { // Spill a physical register around defs and uses. |