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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-03-03 05:18:19 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-03-03 05:18:19 +0000 |
commit | 67a84d08ceaff928d734d10affccc7e5d0510dd9 (patch) | |
tree | 90942394291373014d04a9850dd54bde374f75d2 /llvm/lib/CodeGen/RegAllocLinearScan.cpp | |
parent | db13110e4dce0f0b40d22e5b281df8549d2871e8 (diff) | |
download | bcm5719-llvm-67a84d08ceaff928d734d10affccc7e5d0510dd9.tar.gz bcm5719-llvm-67a84d08ceaff928d734d10affccc7e5d0510dd9.zip |
Avoid comparing invalid slot indexes, and assert that it doesn't happen.
The SlotIndex created by the default construction does not represent a position
in the function, and it doesn't make sense to compare it to other indexes.
llvm-svn: 126924
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocLinearScan.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocLinearScan.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLinearScan.cpp b/llvm/lib/CodeGen/RegAllocLinearScan.cpp index b959878bcdb..a24fc80cf5e 100644 --- a/llvm/lib/CodeGen/RegAllocLinearScan.cpp +++ b/llvm/lib/CodeGen/RegAllocLinearScan.cpp @@ -458,7 +458,7 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { const LiveRange &range = cur.ranges.front(); VNInfo *vni = range.valno; - if (vni->isUnused()) + if (vni->isUnused() || !vni->def.isValid()) return Reg; unsigned CandReg; @@ -993,7 +993,7 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur) { // one, e.g. X86::mov32to32_. These move instructions are not coalescable. if (!vrm_->getRegAllocPref(cur->reg) && cur->hasAtLeastOneValue()) { VNInfo *vni = cur->begin()->valno; - if (!vni->isUnused()) { + if (!vni->isUnused() && vni->def.isValid()) { MachineInstr *CopyMI = li_->getInstructionFromIndex(vni->def); if (CopyMI && CopyMI->isCopy()) { unsigned DstSubReg = CopyMI->getOperand(0).getSubReg(); |