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authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-07-14 05:35:11 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-07-14 05:35:11 +0000
commita153ca5885f2bfb4f15dc31b71daf8e3f5491bc2 (patch)
treec0a882857f40f5216b2e2377f7c9e44414efdebe /llvm/lib/CodeGen/RegAllocGreedy.cpp
parent91d831bc2dbf3fe5a25b9eb2f8e41dfcb5f809b4 (diff)
downloadbcm5719-llvm-a153ca5885f2bfb4f15dc31b71daf8e3f5491bc2.tar.gz
bcm5719-llvm-a153ca5885f2bfb4f15dc31b71daf8e3f5491bc2.zip
Reapply r135121 with a fixed copy constructor.
Original commit message: Count references to interference cache entries. Each InterferenceCache::Cursor instance references a cache entry. A non-zero reference count guarantees that the entry won't be reused for a new register. This makes it possible to have multiple live cursors examining interference for different physregs. The total number of live cursors into a cache must be kept below InterferenceCache::getMaxCursors(). Code generation should be unaffected by this change, and it doesn't seem to affect the cache replacement strategy either. llvm-svn: 135130
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocGreedy.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocGreedy.cpp21
1 files changed, 16 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 4728a050b17..8677a3e257a 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -854,11 +854,6 @@ void RAGreedy::splitAroundRegion(LiveInterval &VirtReg,
});
InterferenceCache::Cursor &Intf = Cand.Intf;
-
- // FIXME: We need cache reference counts to guarantee that Intf hasn't been
- // clobbered.
- Intf.setPhysReg(IntfCache, Cand.PhysReg);
-
LiveRangeEdit LREdit(VirtReg, NewVRegs, this);
SE->reset(LREdit);
@@ -1252,6 +1247,22 @@ unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
Order.rewind();
while (unsigned PhysReg = Order.next()) {
+ // Discard bad candidates before we run out of interference cache cursors.
+ // This will only affect register classes with a lot of registers (>32).
+ if (NumCands == IntfCache.getMaxCursors()) {
+ unsigned WorstCount = ~0u;
+ unsigned Worst = 0;
+ for (unsigned i = 0; i != NumCands; ++i) {
+ if (i == BestCand)
+ continue;
+ unsigned Count = GlobalCand[i].LiveBundles.count();
+ if (Count < WorstCount)
+ Worst = i, WorstCount = Count;
+ }
+ --NumCands;
+ GlobalCand[Worst] = GlobalCand[NumCands];
+ }
+
if (GlobalCand.size() <= NumCands)
GlobalCand.resize(NumCands+1);
GlobalSplitCandidate &Cand = GlobalCand[NumCands];
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