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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-03-19 19:01:34 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-03-19 19:01:34 +0000 |
commit | c2e35a6f3258d102b731c77de9530714c4d02802 (patch) | |
tree | 3227b67cb71f8609ec37dee8694a144c5c3b6316 /llvm/lib/CodeGen/RegAllocFast.cpp | |
parent | 77482120dae780444cff02fbe5ce4cdd8a71873a (diff) | |
download | bcm5719-llvm-c2e35a6f3258d102b731c77de9530714c4d02802.tar.gz bcm5719-llvm-c2e35a6f3258d102b731c77de9530714c4d02802.zip |
RegAllocFast: Remove early selection loop, the spill calculation will report cost 0 anyway for free regs
The 2nd loop calculates spill costs but reports free registers as cost
0 anyway, so there is little benefit from having a separate early
loop.
Surprisingly this is not NFC, as many register are marked regDisabled
so the first loop often picks up later registers unnecessarily instead
of the first one available in the allocation order...
Patch by Matthias Braun
llvm-svn: 356499
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocFast.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocFast.cpp | 10 |
1 files changed, 1 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp index d3e52f92f45..46620d8fa4d 100644 --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -582,17 +582,9 @@ void RegAllocFast::allocVirtReg(MachineInstr &MI, LiveReg &LR, unsigned Hint) { } } - // First try to find a completely free register. - ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); - for (MCPhysReg PhysReg : AllocationOrder) { - if (PhysRegState[PhysReg] == regFree && !isRegUsedInInstr(PhysReg)) { - assignVirtToPhysReg(LR, PhysReg); - return; - } - } - MCPhysReg BestReg = 0; unsigned BestCost = spillImpossible; + ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); for (MCPhysReg PhysReg : AllocationOrder) { LLVM_DEBUG(dbgs() << "\tRegister: " << printReg(PhysReg, TRI) << ' '); unsigned Cost = calcSpillCost(PhysReg); |