summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/RegAllocFast.cpp
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-17 21:02:08 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-17 21:02:08 +0000
commit585792738b5af945221cbad497bfa38f7123dfdf (patch)
tree3bd03d5f05f21130fd0ffce5f57ef758cce85cfb /llvm/lib/CodeGen/RegAllocFast.cpp
parentbf792385996b1e27dea1d146345d1125bfe0b6e1 (diff)
downloadbcm5719-llvm-585792738b5af945221cbad497bfa38f7123dfdf.tar.gz
bcm5719-llvm-585792738b5af945221cbad497bfa38f7123dfdf.zip
Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod. Clang now successfully self hosts in a debug build with the fast register allocator. llvm-svn: 103975
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocFast.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocFast.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp
index 3270b562026..26b3a1453a0 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -381,6 +381,8 @@ void RAFast::definePhysReg(MachineInstr *MI, unsigned PhysReg,
// can be allocated directly.
// Returns spillImpossible when PhysReg or an alias can't be spilled.
unsigned RAFast::calcSpillCost(unsigned PhysReg) const {
+ if (UsedInInstr.test(PhysReg))
+ return spillImpossible;
switch (unsigned VirtReg = PhysRegState[PhysReg]) {
case regDisabled:
break;
@@ -396,6 +398,8 @@ unsigned RAFast::calcSpillCost(unsigned PhysReg) const {
unsigned Cost = 0;
for (const unsigned *AS = TRI->getAliasSet(PhysReg);
unsigned Alias = *AS; ++AS) {
+ if (UsedInInstr.test(Alias))
+ return spillImpossible;
switch (unsigned VirtReg = PhysRegState[Alias]) {
case regDisabled:
break;
@@ -436,14 +440,11 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
// Ignore invalid hints.
if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
- !RC->contains(Hint) || UsedInInstr.test(Hint) ||
- !Allocatable.test(Hint)))
+ !RC->contains(Hint) || !Allocatable.test(Hint)))
Hint = 0;
// Take hint when possible.
if (Hint) {
- assert(RC->contains(Hint) && !UsedInInstr.test(Hint) &&
- Allocatable.test(Hint) && "Invalid hint should have been cleared");
switch(calcSpillCost(Hint)) {
default:
definePhysReg(MI, Hint, regFree);
@@ -470,7 +471,6 @@ void RAFast::allocVirtReg(MachineInstr *MI, LiveRegEntry &LRE, unsigned Hint) {
unsigned BestReg = 0, BestCost = spillImpossible;
for (TargetRegisterClass::iterator I = AOB; I != AOE; ++I) {
- if (UsedInInstr.test(*I)) continue;
unsigned Cost = calcSpillCost(*I);
// Cost is 0 when all aliases are already disabled.
if (Cost == 0)
OpenPOWER on IntegriCloud