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author | Matthias Braun <matze@braunis.de> | 2018-11-07 06:57:00 +0000 |
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committer | Matthias Braun <matze@braunis.de> | 2018-11-07 06:57:00 +0000 |
commit | 0804dca3587ddbaa4ecbac90075fdc8d19e54d16 (patch) | |
tree | 2ca82c14c8c11646c6a73f336aea05930ffc50c9 /llvm/lib/CodeGen/RegAllocFast.cpp | |
parent | 68b2ad7e63770ddf95eff61b0c3497395fdeaaf7 (diff) | |
download | bcm5719-llvm-0804dca3587ddbaa4ecbac90075fdc8d19e54d16.tar.gz bcm5719-llvm-0804dca3587ddbaa4ecbac90075fdc8d19e54d16.zip |
RegAllocFast: Refactor PhysRegState usage; NFC
This is in preparation of https://reviews.llvm.org/D52010.
llvm-svn: 346296
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocFast.cpp')
-rw-r--r-- | llvm/lib/CodeGen/RegAllocFast.cpp | 28 |
1 files changed, 18 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp b/llvm/lib/CodeGen/RegAllocFast.cpp index 242e952bb24..1cd5caba67b 100644 --- a/llvm/lib/CodeGen/RegAllocFast.cpp +++ b/llvm/lib/CodeGen/RegAllocFast.cpp @@ -133,6 +133,8 @@ namespace { /// cannot be allocated. RegUnitSet UsedInInstr; + void setPhysRegState(MCPhysReg PhysReg, unsigned NewState); + /// Mark a physreg as used in this instruction. void markRegUsedInInstr(MCPhysReg PhysReg) { for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) @@ -229,6 +231,10 @@ char RegAllocFast::ID = 0; INITIALIZE_PASS(RegAllocFast, "regallocfast", "Fast Register Allocator", false, false) +void RegAllocFast::setPhysRegState(MCPhysReg PhysReg, unsigned NewState) { + PhysRegState[PhysReg] = NewState; +} + /// This allocates space for the specified virtual register to be held on the /// stack. int RegAllocFast::getStackSpaceFor(unsigned VirtReg) { @@ -328,7 +334,7 @@ void RegAllocFast::killVirtReg(LiveRegMap::iterator LRI) { addKillFlag(*LRI); assert(PhysRegState[LRI->PhysReg] == LRI->VirtReg && "Broken RegState mapping"); - PhysRegState[LRI->PhysReg] = regFree; + setPhysRegState(LRI->PhysReg, regFree); // Erase from LiveVirtRegs unless we're spilling in bulk. if (!isBulkSpilling) LiveVirtRegs.erase(LRI); @@ -438,12 +444,12 @@ void RegAllocFast::usePhysReg(MachineOperand &MO) { case regFree: if (TRI->isSuperRegister(PhysReg, Alias)) { // Leave the superregister in the working set. - PhysRegState[Alias] = regFree; + setPhysRegState(Alias, regFree); MO.getParent()->addRegisterKilled(Alias, TRI, true); return; } // Some other alias was in the working set - clear it. - PhysRegState[Alias] = regDisabled; + setPhysRegState(Alias, regDisabled); break; default: llvm_unreachable("Instruction uses an alias of an allocated register"); @@ -451,7 +457,7 @@ void RegAllocFast::usePhysReg(MachineOperand &MO) { } // All aliases are disabled, bring register into working set. - PhysRegState[PhysReg] = regFree; + setPhysRegState(PhysReg, regFree); MO.setIsKill(); } @@ -469,12 +475,12 @@ void RegAllocFast::definePhysReg(MachineBasicBlock::iterator MI, LLVM_FALLTHROUGH; case regFree: case regReserved: - PhysRegState[PhysReg] = NewState; + setPhysRegState(PhysReg, NewState); return; } // This is a disabled register, disable all aliases. - PhysRegState[PhysReg] = NewState; + setPhysRegState(PhysReg, NewState); for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { MCPhysReg Alias = *AI; switch (unsigned VirtReg = PhysRegState[Alias]) { @@ -485,7 +491,7 @@ void RegAllocFast::definePhysReg(MachineBasicBlock::iterator MI, LLVM_FALLTHROUGH; case regFree: case regReserved: - PhysRegState[Alias] = regDisabled; + setPhysRegState(Alias, regDisabled); if (TRI->isSuperRegister(PhysReg, Alias)) return; break; @@ -547,11 +553,13 @@ unsigned RegAllocFast::calcSpillCost(MCPhysReg PhysReg) const { /// proper container for VirtReg now. The physical register must not be used /// for anything else when this is called. void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) { - LLVM_DEBUG(dbgs() << "Assigning " << printReg(LR.VirtReg, TRI) << " to " + unsigned VirtReg = LR.VirtReg; + LLVM_DEBUG(dbgs() << "Assigning " << printReg(VirtReg, TRI) << " to " << printReg(PhysReg, TRI) << "\n"); - PhysRegState[PhysReg] = LR.VirtReg; - assert(!LR.PhysReg && "Already assigned a physreg"); + assert(LR.PhysReg == 0 && "Already assigned a physreg"); + assert(PhysReg != 0 && "Trying to assign no register"); LR.PhysReg = PhysReg; + setPhysRegState(PhysReg, VirtReg); } RegAllocFast::LiveRegMap::iterator |