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authorEugene Zelenko <eugene.zelenko@gmail.com>2017-09-13 21:15:20 +0000
committerEugene Zelenko <eugene.zelenko@gmail.com>2017-09-13 21:15:20 +0000
commit618c555bbefd2c73a874590deeb952df08a7af8e (patch)
tree20c165031da3f6927a5a5d63257b681dbac88d2e /llvm/lib/CodeGen/RegAllocBase.cpp
parent44550600f295b4bd3486da95507d37c600d1539e (diff)
downloadbcm5719-llvm-618c555bbefd2c73a874590deeb952df08a7af8e.tar.gz
bcm5719-llvm-618c555bbefd2c73a874590deeb952df08a7af8e.zip
[CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 313194
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp')
-rw-r--r--llvm/lib/CodeGen/RegAllocBase.cpp11
1 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp
index 7b4fbace2c1..a5e03f7c8de 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -1,4 +1,4 @@
-//===-- RegAllocBase.cpp - Register Allocator Base Class ------------------===//
+//===- RegAllocBase.cpp - Register Allocator Base Class -------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -14,19 +14,22 @@
#include "RegAllocBase.h"
#include "Spiller.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "llvm/CodeGen/LiveRangeEdit.h"
#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
+#include "llvm/Pass.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Timer.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include <cassert>
using namespace llvm;
@@ -103,7 +106,9 @@ void RegAllocBase::allocatePhysRegs() {
DEBUG(dbgs() << "\nselectOrSplit "
<< TRI->getRegClassName(MRI->getRegClass(VirtReg->reg))
<< ':' << *VirtReg << " w=" << VirtReg->weight << '\n');
- typedef SmallVector<unsigned, 4> VirtRegVec;
+
+ using VirtRegVec = SmallVector<unsigned, 4>;
+
VirtRegVec SplitVRegs;
unsigned AvailablePhysReg = selectOrSplit(*VirtReg, SplitVRegs);
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