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authorAndrew Trick <atrick@apple.com>2012-02-08 21:22:53 +0000
committerAndrew Trick <atrick@apple.com>2012-02-08 21:22:53 +0000
commitdf7e3769b5765e80e816e6a6897c4dfc41263204 (patch)
treeb26840a799a33dacf36a8aa820d57a1cd10061dc /llvm/lib/CodeGen/PostRASchedulerList.cpp
parent58648e4e98a9e7ba0926cf638f3c107c27711b0d (diff)
downloadbcm5719-llvm-df7e3769b5765e80e816e6a6897c4dfc41263204.tar.gz
bcm5719-llvm-df7e3769b5765e80e816e6a6897c4dfc41263204.zip
Move pass configuration out of pass constructors: PostRAScheduler.
llvm-svn: 150096
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
-rw-r--r--llvm/lib/CodeGen/PostRASchedulerList.cpp14
1 files changed, 8 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp
index 1e06ee91990..bc81464954b 100644
--- a/llvm/lib/CodeGen/PostRASchedulerList.cpp
+++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp
@@ -82,16 +82,15 @@ namespace {
AliasAnalysis *AA;
const TargetInstrInfo *TII;
RegisterClassInfo RegClassInfo;
- CodeGenOpt::Level OptLevel;
public:
static char ID;
- PostRAScheduler(CodeGenOpt::Level ol) :
- MachineFunctionPass(ID), OptLevel(ol) {}
+ PostRAScheduler() : MachineFunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG();
AU.addRequired<AliasAnalysis>();
+ AU.addRequired<TargetPassConfig>();
AU.addRequired<MachineDominatorTree>();
AU.addPreserved<MachineDominatorTree>();
AU.addRequired<MachineLoopInfo>();
@@ -209,6 +208,8 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>();
MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>();
AliasAnalysis *AA = &getAnalysis<AliasAnalysis>();
+ TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
+
RegClassInfo.runOnMachineFunction(Fn);
// Check for explicit enable/disable of post-ra scheduling.
@@ -222,7 +223,8 @@ bool PostRAScheduler::runOnMachineFunction(MachineFunction &Fn) {
// Check that post-RA scheduling is enabled for this target.
// This may upgrade the AntiDepMode.
const TargetSubtargetInfo &ST = Fn.getTarget().getSubtarget<TargetSubtargetInfo>();
- if (!ST.enablePostRAScheduler(OptLevel, AntiDepMode, CriticalPathRCs))
+ if (!ST.enablePostRAScheduler(PassConfig->getOptLevel(), AntiDepMode,
+ CriticalPathRCs))
return false;
}
@@ -710,6 +712,6 @@ void SchedulePostRATDList::ListScheduleTopDown() {
// Public Constructor Functions
//===----------------------------------------------------------------------===//
-FunctionPass *llvm::createPostRAScheduler(CodeGenOpt::Level OptLevel) {
- return new PostRAScheduler(OptLevel);
+FunctionPass *llvm::createPostRAScheduler() {
+ return new PostRAScheduler();
}
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