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| author | Andrew Trick <atrick@apple.com> | 2012-01-14 02:17:12 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2012-01-14 02:17:12 +0000 |
| commit | 1d028a364d6fcee53f163ad2d3fa754a7fb860f5 (patch) | |
| tree | fd82dae85eef86a69d95d75eacb31256ff86d4aa /llvm/lib/CodeGen/PostRASchedulerList.cpp | |
| parent | 7e120f4e664794b22a19ee6ff64a4fa1ac5b6249 (diff) | |
| download | bcm5719-llvm-1d028a364d6fcee53f163ad2d3fa754a7fb860f5.tar.gz bcm5719-llvm-1d028a364d6fcee53f163ad2d3fa754a7fb860f5.zip | |
misched: Added ScheduleDAGInstrs::IsPostRA
llvm-svn: 148172
Diffstat (limited to 'llvm/lib/CodeGen/PostRASchedulerList.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/PostRASchedulerList.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/PostRASchedulerList.cpp b/llvm/lib/CodeGen/PostRASchedulerList.cpp index fa832c867a5..1e06ee91990 100644 --- a/llvm/lib/CodeGen/PostRASchedulerList.cpp +++ b/llvm/lib/CodeGen/PostRASchedulerList.cpp @@ -185,7 +185,7 @@ SchedulePostRATDList::SchedulePostRATDList( AliasAnalysis *AA, const RegisterClassInfo &RCI, TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, SmallVectorImpl<TargetRegisterClass*> &CriticalPathRCs) - : ScheduleDAGInstrs(MF, MLI, MDT), Topo(SUnits), AA(AA), + : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), Topo(SUnits), AA(AA), KillIndices(TRI->getNumRegs()) { const TargetMachine &TM = MF.getTarget(); |
