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authorEric Christopher <echristo@gmail.com>2015-03-11 22:56:10 +0000
committerEric Christopher <echristo@gmail.com>2015-03-11 22:56:10 +0000
commit5f141b03fa622e6c2992b3c0b855a297f585dc0d (patch)
treed02eb5eb77ca6e0d87ca55236b2689761f0e2c27 /llvm/lib/CodeGen/Passes.cpp
parent9deb75d1766f7082dfd3aeae0e2970383c0e624c (diff)
downloadbcm5719-llvm-5f141b03fa622e6c2992b3c0b855a297f585dc0d.tar.gz
bcm5719-llvm-5f141b03fa622e6c2992b3c0b855a297f585dc0d.zip
Remove useMachineScheduler and replace it with subtarget options
that control, individually, all of the disparate things it was controlling. At the same time move a FIXME in the Hexagon port to a new subtarget function that will enable a user of the machine scheduler to avoid using the source scheduler for pre-RA-scheduling. The FIXME would have this removed, but involves either testcase changes or adding -pre-RA-sched=source to a few testcases. llvm-svn: 231980
Diffstat (limited to 'llvm/lib/CodeGen/Passes.cpp')
-rw-r--r--llvm/lib/CodeGen/Passes.cpp33
1 files changed, 0 insertions, 33 deletions
diff --git a/llvm/lib/CodeGen/Passes.cpp b/llvm/lib/CodeGen/Passes.cpp
index 272d06887fe..d692862adf4 100644
--- a/llvm/lib/CodeGen/Passes.cpp
+++ b/llvm/lib/CodeGen/Passes.cpp
@@ -55,9 +55,6 @@ static cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden,
static cl::opt<cl::boolOrDefault>
OptimizeRegAlloc("optimize-regalloc", cl::Hidden,
cl::desc("Enable optimized register allocation compilation path."));
-static cl::opt<cl::boolOrDefault>
-EnableMachineSched("enable-misched",
- cl::desc("Enable the machine instruction scheduling pass."));
static cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm",
cl::Hidden,
cl::desc("Disable Machine LICM"));
@@ -116,28 +113,6 @@ static IdentifyingPassPtr applyDisable(IdentifyingPassPtr PassID,
return PassID;
}
-/// Allow Pass selection to be overriden by command line options. This supports
-/// flags with ternary conditions. TargetID is passed through by default. The
-/// pass is suppressed when the option is false. When the option is true, the
-/// StandardID is selected if the target provides no default.
-static IdentifyingPassPtr applyOverride(IdentifyingPassPtr TargetID,
- cl::boolOrDefault Override,
- AnalysisID StandardID) {
- switch (Override) {
- case cl::BOU_UNSET:
- return TargetID;
- case cl::BOU_TRUE:
- if (TargetID.isValid())
- return TargetID;
- if (StandardID == nullptr)
- report_fatal_error("Target cannot enable pass");
- return StandardID;
- case cl::BOU_FALSE:
- return IdentifyingPassPtr();
- }
- llvm_unreachable("Invalid command line option state");
-}
-
/// Allow standard passes to be disabled by the command line, regardless of who
/// is adding the pass.
///
@@ -182,9 +157,6 @@ static IdentifyingPassPtr overridePass(AnalysisID StandardID,
if (StandardID == &MachineCSEID)
return applyDisable(TargetID, DisableMachineCSE);
- if (StandardID == &MachineSchedulerID)
- return applyOverride(TargetID, EnableMachineSched, StandardID);
-
if (StandardID == &TargetPassConfig::PostRAMachineLICMID)
return applyDisable(TargetID, DisablePostRAMachineLICM);
@@ -249,11 +221,6 @@ TargetPassConfig::TargetPassConfig(TargetMachine *tm, PassManagerBase &pm)
// Substitute Pseudo Pass IDs for real ones.
substitutePass(&EarlyTailDuplicateID, &TailDuplicateID);
substitutePass(&PostRAMachineLICMID, &MachineLICMID);
-
- // Temporarily disable experimental passes.
- const TargetSubtargetInfo &ST = *TM->getSubtargetImpl();
- if (!ST.useMachineScheduler())
- disablePass(&MachineSchedulerID);
}
/// Insert InsertedPassID pass after TargetPassID.
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