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authorJakob Stoklund Olesen <stoklund@2pi.dk>2013-02-05 18:21:56 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2013-02-05 18:21:56 +0000
commit4acf7dd86694ab11d56d9d62e0362c531719af3b (patch)
treed4e852e199c1c64ffd8c16e29b0480b8ae363b08 /llvm/lib/CodeGen/MachineInstr.cpp
parentc338679c9d9853d8c47fef28c6db97e1bf98074b (diff)
downloadbcm5719-llvm-4acf7dd86694ab11d56d9d62e0362c531719af3b.tar.gz
bcm5719-llvm-4acf7dd86694ab11d56d9d62e0362c531719af3b.zip
Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists. llvm-svn: 174417
Diffstat (limited to 'llvm/lib/CodeGen/MachineInstr.cpp')
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index d8b5fd4ea3d..32d066894b5 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -1515,12 +1515,12 @@ void MachineInstr::print(raw_ostream &OS, const TargetMachine *TM,
unsigned Reg = MO.getReg();
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
const MachineRegisterInfo &MRI = MF->getRegInfo();
- if (MRI.use_empty(Reg) && !MRI.isLiveOut(Reg)) {
+ if (MRI.use_empty(Reg)) {
bool HasAliasLive = false;
for (MCRegAliasIterator AI(Reg, TM->getRegisterInfo(), true);
AI.isValid(); ++AI) {
unsigned AliasReg = *AI;
- if (!MRI.use_empty(AliasReg) || MRI.isLiveOut(AliasReg)) {
+ if (!MRI.use_empty(AliasReg)) {
HasAliasLive = true;
break;
}
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