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| author | Andrew Trick <atrick@apple.com> | 2013-04-13 06:07:40 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-04-13 06:07:40 +0000 |
| commit | e833e1cd6eeb722edbb5c5f316fbca16abd384c9 (patch) | |
| tree | 66678682e05b7164c4b9770c298946ee7648c502 /llvm/lib/CodeGen/MachineFunctionAnalysis.cpp | |
| parent | 52b8387fd1755ab578daa7185199e8979d525fae (diff) | |
| download | bcm5719-llvm-e833e1cd6eeb722edbb5c5f316fbca16abd384c9.tar.gz bcm5719-llvm-e833e1cd6eeb722edbb5c5f316fbca16abd384c9.zip | |
MI-Sched: schedule physreg copies.
The register allocator expects minimal physreg live ranges. Schedule
physreg copies accordingly. This is slightly tricky when they occur in
the middle of the scheduling region. For now, this is handled by
rescheduling the copy when its associated instruction is
scheduled. Eventually we may instead bundle them, but only if we can
preserve the bundles as parallel copies during regalloc.
llvm-svn: 179449
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunctionAnalysis.cpp')
0 files changed, 0 insertions, 0 deletions
