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author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 16:49:19 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-08-02 16:49:19 +0000 |
commit | b109d51865e5aeae8ca2e9b1e62f56d80a5b3ad1 (patch) | |
tree | c5156fc28e8d5fa0a92a719adfe239e026e568a0 /llvm/lib/CodeGen/MachineFunction.cpp | |
parent | c43aa5a5b62b21c1d38cd3d2ece7d0d5124d5180 (diff) | |
download | bcm5719-llvm-b109d51865e5aeae8ca2e9b1e62f56d80a5b3ad1.tar.gz bcm5719-llvm-b109d51865e5aeae8ca2e9b1e62f56d80a5b3ad1.zip |
[GlobalISel] Add Selected MachineFunction property.
Selected: the InstructionSelect pass ran and all pre-isel generic
instructions have been eliminated; i.e., all instructions are now
target-specific or non-pre-isel generic instructions (e.g., COPY).
Since only pre-isel generic instructions can have generic virtual register
operands, this also means that all generic virtual registers have been
constrained to virtual registers (assigned to register classes) and that
all sizes attached to them have been eliminated.
This lets us enforce certain invariants across passes.
This property is GlobalISel-specific, but is always available.
llvm-svn: 277482
Diffstat (limited to 'llvm/lib/CodeGen/MachineFunction.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineFunction.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp index 6cd3b65b294..c84faafaa48 100644 --- a/llvm/lib/CodeGen/MachineFunction.cpp +++ b/llvm/lib/CodeGen/MachineFunction.cpp @@ -82,6 +82,9 @@ void MachineFunctionProperties::print(raw_ostream &ROS, bool OnlySet) const { case Property::RegBankSelected: ROS << (HasProperty ? "" : "not ") << "RegBank-selected"; break; + case Property::Selected: + ROS << (HasProperty ? "" : "not ") << "selected"; + break; default: break; } |