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author | Nico Weber <thakis@chromium.org> | 2020-01-08 22:50:49 -0500 |
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committer | Nico Weber <thakis@chromium.org> | 2020-01-08 22:50:49 -0500 |
commit | 71d64f72f934631aa2f12b9542c23f74f256f494 (patch) | |
tree | 4e40ee1227481bbceefbccfe20f4e9685e4f461c /llvm/lib/CodeGen/MIRPrinter.cpp | |
parent | 3ef05d85be8c3666ebfa3ad986eb334da5195a47 (diff) | |
download | bcm5719-llvm-71d64f72f934631aa2f12b9542c23f74f256f494.tar.gz bcm5719-llvm-71d64f72f934631aa2f12b9542c23f74f256f494.zip |
Revert "[MIR] Target specific MIR formating and parsing"
This reverts commit 3ef05d85be8c3666ebfa3ad986eb334da5195a47.
It broke check-llvm on many bots, see comments on D69836.
Diffstat (limited to 'llvm/lib/CodeGen/MIRPrinter.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MIRPrinter.cpp | 27 |
1 files changed, 2 insertions, 25 deletions
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index 9d9c12a9591..b06e34a809f 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -709,7 +709,6 @@ void MIPrinter::print(const MachineInstr &MI) { const auto *TRI = SubTarget.getRegisterInfo(); assert(TRI && "Expected target register info"); const auto *TII = SubTarget.getInstrInfo(); - const auto *MIRF = MF->getTarget().getMIRFormatter(); assert(TII && "Expected target instruction info"); if (MI.isCFIInstruction()) assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction"); @@ -808,7 +807,7 @@ void MIPrinter::print(const MachineInstr &MI) { for (const auto *Op : MI.memoperands()) { if (NeedComma) OS << ", "; - Op->print(OS, MST, SSNs, Context, &MFI, TII, MIRF); + Op->print(OS, MST, SSNs, Context, &MFI, TII); NeedComma = true; } } @@ -857,7 +856,7 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo(); - Op.print(OS, MST, TypeToPrint, OpIdx, PrintDef, /*IsStandalone=*/false, + Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false, ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII); break; } @@ -875,28 +874,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, } } -void MIRFormatter::printIRValue(raw_ostream &OS, const Value &V, - ModuleSlotTracker &MST) { - if (isa<GlobalValue>(V)) { - V.printAsOperand(OS, /*PrintType=*/false, MST); - return; - } - if (isa<Constant>(V)) { - // Machine memory operands can load/store to/from constant value pointers. - OS << '`'; - V.printAsOperand(OS, /*PrintType=*/true, MST); - OS << '`'; - return; - } - OS << "%ir."; - if (V.hasName()) { - printLLVMNameWithoutPrefix(OS, V.getName()); - return; - } - int Slot = MST.getCurrentFunction() ? MST.getLocalSlot(&V) : -1; - MachineOperand::printIRSlotNumber(OS, Slot); -} - void llvm::printMIR(raw_ostream &OS, const Module &M) { yaml::Output Out(OS); Out << const_cast<Module &>(M); |