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authorDan Gohman <gohman@apple.com>2008-09-13 17:58:21 +0000
committerDan Gohman <gohman@apple.com>2008-09-13 17:58:21 +0000
commit38453eebdc6390c4050d592c4fdd96c395524217 (patch)
treee30cf636d85c99e45c65a42cccbdce20079450b9 /llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
parent9ddb3145aef88368e38d0719ad7d6edeb9a3bab3 (diff)
downloadbcm5719-llvm-38453eebdc6390c4050d592c4fdd96c395524217.tar.gz
bcm5719-llvm-38453eebdc6390c4050d592c4fdd96c395524217.zip
Remove isImm(), isReg(), and friends, in favor of
isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
Diffstat (limited to 'llvm/lib/CodeGen/LiveIntervalAnalysis.cpp')
-rw-r--r--llvm/lib/CodeGen/LiveIntervalAnalysis.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
index 4e4be8f645d..41804db13dc 100644
--- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -858,7 +858,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li,
unsigned ImpUse = 0;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg()) {
+ if (MO.isRegister()) {
unsigned Reg = MO.getReg();
if (Reg == 0)
continue;
@@ -1592,7 +1592,7 @@ LiveIntervals::handleSpilledImpDefs(const LiveInterval &li, VirtRegMap &vrm,
NewLIs.push_back(&getOrCreateInterval(NewVReg));
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg() && MO.getReg() == li.reg)
+ if (MO.isRegister() && MO.getReg() == li.reg)
MO.setReg(NewVReg);
}
}
@@ -1636,7 +1636,7 @@ addIntervalsForSpillsFast(const LiveInterval &li,
for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
MachineOperand& mop = MI->getOperand(i);
- if (!mop.isReg() || mop.getReg() != li.reg) continue;
+ if (!mop.isRegister() || mop.getReg() != li.reg) continue;
HasUse |= MI->getOperand(i).isUse();
HasDef |= MI->getOperand(i).isDef();
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