Enable DeadMachineInstructionElim when Fast-ISel is enabled.

llvm-svn: 56604

1 files changed, 13 insertions, 0 deletions

diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 60925f31ddf..93685401369 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -25,6 +25,10 @@
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
+namespace llvm {
+  bool EnableFastISel;
+}
+
 static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
     cl::desc("Print LLVM IR produced by the loop-reduce pass"));
 static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
@@ -49,6 +53,11 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
                        cl::desc("Disable scheduling after register allocation"),
                        cl::init(true));
 
+static cl::opt<bool, true>
+FastISelOption("fast-isel", cl::Hidden,
+               cl::desc("Enable the experimental \"fast\" instruction selector"),
+               cl::location(EnableFastISel));
+
 FileModel::Model
 LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
                                        raw_ostream &Out,
@@ -168,6 +177,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
+  // If we're using Fast-ISel, clean up the mess.
+  if (EnableFastISel)
+    PM.add(createDeadMachineInstructionElimPass());
+
   if (EnableLICM)
     PM.add(createMachineLICMPass());