summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/GlobalISel
diff options
context:
space:
mode:
authorTim Northover <tnorthover@apple.com>2016-08-31 21:24:02 +0000
committerTim Northover <tnorthover@apple.com>2016-08-31 21:24:02 +0000
commit11a235467088c800fe0a7323cb18a55fe9fe0cd3 (patch)
treeb8a59758a42fd6d569adfd9b48779a935c3337fe /llvm/lib/CodeGen/GlobalISel
parent7caf48cc5bd762a1a5a363c73ec31184cf89e9bc (diff)
downloadbcm5719-llvm-11a235467088c800fe0a7323cb18a55fe9fe0cd3.tar.gz
bcm5719-llvm-11a235467088c800fe0a7323cb18a55fe9fe0cd3.zip
GlobalISel: use G_TYPE to annotate physregs with a type.
More preparation for dropping source types from MachineInstrs: regsters coming out of already-selected code (i.e. non-generic instructions) don't have a type, but that information is needed so we must add it manually. This is done via a new G_TYPE instruction. llvm-svn: 280292
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel')
-rw-r--r--llvm/lib/CodeGen/GlobalISel/CallLowering.cpp6
-rw-r--r--llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp5
-rw-r--r--llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp3
-rw-r--r--llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp3
-rw-r--r--llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp3
5 files changed, 15 insertions, 5 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
index 9d1c1e7402d..4ce643de52e 100644
--- a/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
@@ -25,9 +25,9 @@ bool CallLowering::lowerCall(
// First step is to marshall all the function's parameters into the correct
// physregs and memory locations. Gather the sequence of argument types that
// we'll pass to the assigner function.
- SmallVector<MVT, 8> ArgTys;
+ SmallVector<Type *, 8> ArgTys;
for (auto &Arg : CI.arg_operands())
- ArgTys.push_back(MVT::getVT(Arg->getType()));
+ ArgTys.push_back(Arg->getType());
MachineOperand Callee = MachineOperand::CreateImm(0);
if (Function *F = CI.getCalledFunction())
@@ -35,6 +35,6 @@ bool CallLowering::lowerCall(
else
Callee = MachineOperand::CreateReg(GetCalleeReg(), false);
- return lowerCall(MIRBuilder, Callee, MVT::getVT(CI.getType()),
+ return lowerCall(MIRBuilder, Callee, CI.getType(),
ResReg ? ResReg : ArrayRef<unsigned>(), ArgTys, ArgRegs);
}
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index df48c428cb1..da18b036f0c 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -168,6 +168,11 @@ MachineIRBuilder::buildUAdde(ArrayRef<LLT> Tys, unsigned Res, unsigned CarryOut,
.addUse(CarryIn);
}
+MachineInstrBuilder MachineIRBuilder::buildType(LLT Ty,
+ unsigned Res, unsigned Op) {
+ return buildInstr(TargetOpcode::G_TYPE, Ty).addDef(Res).addUse(Op);
+}
+
MachineInstrBuilder MachineIRBuilder::buildAnyExt(ArrayRef<LLT> Tys,
unsigned Res, unsigned Op) {
validateTruncExt(Tys, true);
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
index 9787227d284..18db91cbd28 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp
@@ -104,7 +104,8 @@ MachineLegalizeHelper::libcall(MachineInstr &MI) {
default:
return UnableToLegalize;
case TargetOpcode::G_FREM: {
- MVT Ty = MVT::getFloatingPointVT(MI.getType().getSizeInBits());
+ auto &Ctx = MIRBuilder.getMF().getFunction()->getContext();
+ Type *Ty = Size == 64 ? Type::getDoubleTy(Ctx) : Type::getFloatTy(Ctx);
auto &CLI = *MIRBuilder.getMF().getSubtarget().getCallLowering();
auto &TLI = *MIRBuilder.getMF().getSubtarget().getTargetLowering();
const char *Name =
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp b/llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
index baef7657eac..cc3d4ecd7c6 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineLegalizer.cpp
@@ -30,6 +30,9 @@ MachineLegalizer::MachineLegalizer() : TablesInitialized(false) {
DefaultActions[TargetOpcode::G_ANYEXT] = Legal;
DefaultActions[TargetOpcode::G_TRUNC] = Legal;
+ // G_TYPE is essentially an annotated COPY so it's always legal.
+ DefaultActions[TargetOpcode::G_TYPE] = Legal;
+
DefaultActions[TargetOpcode::G_INTRINSIC] = Legal;
DefaultActions[TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS] = Legal;
diff --git a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
index 5e5541799c5..5a950ff17c1 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
@@ -224,7 +224,8 @@ RegisterBankInfo::getInstrMappingImpl(const MachineInstr &MI) const {
bool CompleteMapping = true;
// For copies we want to walk over the operands and try to find one
// that has a register bank.
- bool isCopyLike = MI.isCopy() || MI.isPHI();
+ bool isCopyLike =
+ MI.isCopy() || MI.isPHI() || MI.getOpcode() == TargetOpcode::G_TYPE;
// Remember the register bank for reuse for copy-like instructions.
const RegisterBank *RegBank = nullptr;
// Remember the size of the register for reuse for copy-like instructions.
OpenPOWER on IntegriCloud