Speed up the AllocationOrder class a bit.

Allow the central functions to be inlined, and use the argumentless
isHint() function when possible.

llvm-svn: 169319

1 files changed, 1 insertions, 18 deletions

diff --git a/llvm/lib/CodeGen/AllocationOrder.cpp b/llvm/lib/CodeGen/AllocationOrder.cpp
index a76791025d9..94754a0d35a 100644
--- a/llvm/lib/CodeGen/AllocationOrder.cpp
+++ b/llvm/lib/CodeGen/AllocationOrder.cpp
@@ -35,6 +35,7 @@ AllocationOrder::AllocationOrder(unsigned VirtReg,
   const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
   Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
   TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
+  rewind();
 
   DEBUG({
     if (!Hints.empty()) {
@@ -45,21 +46,3 @@ AllocationOrder::AllocationOrder(unsigned VirtReg,
     }
   });
 }
-
-bool AllocationOrder::isHint(unsigned PhysReg) const {
-  return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end();
-}
-
-unsigned AllocationOrder::next() {
-  if (Pos < Hints.size())
-    return Hints[Pos++];
-  ArrayRef<MCPhysReg>::iterator I = Order.begin() + (Pos - Hints.size());
-  ArrayRef<MCPhysReg>::iterator E = Order.end();
-  while (I != E) {
-    unsigned Reg = *I++;
-    ++Pos;
-    if (!isHint(Reg))
-      return Reg;
-  }
-  return 0;
-}