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| author | Igor Breger <igor.breger@intel.com> | 2015-10-15 12:33:24 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2015-10-15 12:33:24 +0000 |
| commit | b4bb190eed5e59f592b6aed8b30a4428baeb6737 (patch) | |
| tree | 11eb91de1e9896df0ef943900a6a4cba63474dcb /llvm/include | |
| parent | 37f0b7d28a02d7d1e4f88d95b2fb5d723966727f (diff) | |
| download | bcm5719-llvm-b4bb190eed5e59f592b6aed8b30a4428baeb6737.tar.gz bcm5719-llvm-b4bb190eed5e59f592b6aed8b30a4428baeb6737.zip | |
AVX512: Implemented encoding and intrinsics for vpternlogd/q.
Differential Revision: http://reviews.llvm.org/D13768
llvm-svn: 250396
Diffstat (limited to 'llvm/include')
| -rw-r--r-- | llvm/include/llvm/IR/IntrinsicsX86.td | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 4f92363c566..938c02c933f 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -7048,6 +7048,82 @@ let TargetPrefix = "x86" in { [llvm_ptr_ty, llvm_v32i16_ty, llvm_i32_ty], [IntrReadWriteArgMem]>; } + +// Bitwise ternary logic +let TargetPrefix = "x86" in { + def int_x86_avx512_mask_pternlog_d_128 : + GCCBuiltin<"__builtin_ia32_pternlogd128_mask">, + Intrinsic<[llvm_v4i32_ty], + [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_d_128 : + GCCBuiltin<"__builtin_ia32_pternlogd128_maskz">, + Intrinsic<[llvm_v4i32_ty], + [llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_mask_pternlog_d_256 : + GCCBuiltin<"__builtin_ia32_pternlogd256_mask">, + Intrinsic<[llvm_v8i32_ty], + [llvm_v8i32_ty, llvm_v8i32_ty, llvm_v8i32_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_d_256 : + GCCBuiltin<"__builtin_ia32_pternlogd256_maskz">, + Intrinsic<[llvm_v8i32_ty], + [llvm_v8i32_ty, llvm_v8i32_ty, llvm_v8i32_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_mask_pternlog_d_512 : + GCCBuiltin<"__builtin_ia32_pternlogd512_mask">, + Intrinsic<[llvm_v16i32_ty], + [llvm_v16i32_ty, llvm_v16i32_ty, llvm_v16i32_ty, llvm_i32_ty, + llvm_i16_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_d_512 : + GCCBuiltin<"__builtin_ia32_pternlogd512_maskz">, + Intrinsic<[llvm_v16i32_ty], + [llvm_v16i32_ty, llvm_v16i32_ty, llvm_v16i32_ty, llvm_i32_ty, + llvm_i16_ty], [IntrNoMem]>; + + def int_x86_avx512_mask_pternlog_q_128 : + GCCBuiltin<"__builtin_ia32_pternlogq128_mask">, + Intrinsic<[llvm_v2i64_ty], + [llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_q_128 : + GCCBuiltin<"__builtin_ia32_pternlogq128_maskz">, + Intrinsic<[llvm_v2i64_ty], + [llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_mask_pternlog_q_256 : + GCCBuiltin<"__builtin_ia32_pternlogq256_mask">, + Intrinsic<[llvm_v4i64_ty], + [llvm_v4i64_ty, llvm_v4i64_ty, llvm_v4i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_q_256 : + GCCBuiltin<"__builtin_ia32_pternlogq256_maskz">, + Intrinsic<[llvm_v4i64_ty], + [llvm_v4i64_ty, llvm_v4i64_ty, llvm_v4i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_mask_pternlog_q_512 : + GCCBuiltin<"__builtin_ia32_pternlogq512_mask">, + Intrinsic<[llvm_v8i64_ty], + [llvm_v8i64_ty, llvm_v8i64_ty, llvm_v8i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; + + def int_x86_avx512_maskz_pternlog_q_512 : + GCCBuiltin<"__builtin_ia32_pternlogq512_maskz">, + Intrinsic<[llvm_v8i64_ty], + [llvm_v8i64_ty, llvm_v8i64_ty, llvm_v8i64_ty, llvm_i32_ty, + llvm_i8_ty], [IntrNoMem]>; +} + // Misc. let TargetPrefix = "x86" in { def int_x86_avx512_mask_cmp_ps_512 : |

