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authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-15 17:50:28 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-07-15 17:50:28 +0000
commit269e4e1b60127711cf6d8e76291342c907b95a8b (patch)
tree72d47b072800d56ab275c161cc35f4fd375472dc /llvm/docs/ReleaseNotes.rst
parent7938424eb9287679623259d84c316cf5a96a8c83 (diff)
downloadbcm5719-llvm-269e4e1b60127711cf6d8e76291342c907b95a8b.tar.gz
bcm5719-llvm-269e4e1b60127711cf6d8e76291342c907b95a8b.zip
Add some release notes for 9.0 release
llvm-svn: 366093
Diffstat (limited to 'llvm/docs/ReleaseNotes.rst')
-rw-r--r--llvm/docs/ReleaseNotes.rst12
1 files changed, 11 insertions, 1 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index c3ce86bf615..ebf2c8db7ba 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -76,6 +76,10 @@ Changes to the LLVM IR
pointee type. In the next release we intend to make this parameter
mandatory in preparation for opaque pointer types.
+* ``atomicrmw xchg`` now allows floating point types
+
+* ``atomicrmw`` now supports ``fadd`` and ``fsub``
+
Changes to building LLVM
------------------------
@@ -107,7 +111,13 @@ Changes to the X86 Target
Changes to the AMDGPU Target
-----------------------------
- During this release ...
+* Function call support is now enabled by default
+
+* Improved support for 96-bit loads and stores
+
+* DPP combiner pass is now enabled by default
+
+* Support for gfx10
Changes to the AVR Target
-----------------------------
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