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authorCoby Tayree <coby.tayree@intel.com>2016-11-22 09:30:29 +0000
committerCoby Tayree <coby.tayree@intel.com>2016-11-22 09:30:29 +0000
commit49b3733d57692a4726cce257e95932f2b74a2b30 (patch)
treee76a677446984093d471575d1c012e5ce508925a /lldb/source/Commands/CommandObjectFrame.cpp
parent8b2ddfeb0b65a4682a3db108a347f160591bb68c (diff)
downloadbcm5719-llvm-49b3733d57692a4726cce257e95932f2b74a2b30.tar.gz
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[AVX512][inline-asm] Fix AVX512 inline assembly instruction resolution when the size qualifier of a memory operand is not specified explicitly.
This commit handles cases where the size qualifier of an indirect memory reference operand in Intel syntax is missing (e.g. "vaddps xmm1, xmm2, [a]"). GCC will deduce the size qualifier for AVX512 vector and broadcast memory operands based on the possible matches: "vaddps xmm1, xmm2, [a]" matches only “XMMWORD PTR” qualifier. "vaddps xmm1, xmm2, [a]{1to4}" matches only “DWORD PTR” qualifier. This is different from the current behavior of LLVM, which deduces the size qualifier based on the size of the memory operand. For "vaddps xmm1, xmm2, [a]" "char a;" will imply "BYTE PTR" qualifier "short a;" will imply "WORD PTR" qualifier. This commit aligns LLVM to GCC’s behavior. This is the LLVM part of the review. The Clang part of the review: https://reviews.llvm.org/D26587 Differential Revision: https://reviews.llvm.org/D26586 llvm-svn: 287630
Diffstat (limited to 'lldb/source/Commands/CommandObjectFrame.cpp')
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