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author | Alex Bradbury <asb@lowrisc.org> | 2019-07-18 18:29:59 +0000 |
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committer | Alex Bradbury <asb@lowrisc.org> | 2019-07-18 18:29:59 +0000 |
commit | e078967adf4f4f84da52b8d739aea75ed2ce5f16 (patch) | |
tree | 9bb3bc093067c460e63ac4e4260962871ea01699 /lldb/packages/Python/lldbsuite/test/expression_command | |
parent | f332fe642cc576b7c52c643b7024e6839407d34b (diff) | |
download | bcm5719-llvm-e078967adf4f4f84da52b8d739aea75ed2ce5f16.tar.gz bcm5719-llvm-e078967adf4f4f84da52b8d739aea75ed2ce5f16.zip |
[RISCV] Hard float ABI support
The RISC-V hard float calling convention requires the frontend to:
* Detect cases where, once "flattened", a struct can be passed using
int+fp or fp+fp registers under the hard float ABI and coerce to the
appropriate type(s)
* Track usage of GPRs and FPRs in order to gate the above, and to
determine when signext/zeroext attributes must be added to integer
scalars
This patch attempts to do this in compliance with the documented ABI,
and uses ABIArgInfo::CoerceAndExpand in order to do this. @rjmccall, as
author of that code I've tagged you as reviewer for initial feedback on
my usage.
Note that a previous version of the ABI indicated that when passing an
int+fp struct using a GPR+FPR, the int would need to be sign or
zero-extended appropriately. GCC never did this and the ABI was changed,
which makes life easier as ABIArgInfo::CoerceAndExpand can't currently
handle sign/zero-extension attributes.
Re-landed after backing out 366450 due to missed hunks.
Differential Revision: https://reviews.llvm.org/D60456
llvm-svn: 366480
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command')
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