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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-16 20:52:52 +0000 |
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| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-16 20:52:52 +0000 |
| commit | 2e0f6c9b2141df80bef932ecbaae182d70c5a844 (patch) | |
| tree | 11f1b42058afb34f9553c3853e6bfa21df4b6ab5 /lldb/packages/Python/lldbsuite/test/expression_command/call-function | |
| parent | c72ece6c2cb92edfd040d92b7fa6ca62bdaa8293 (diff) | |
| download | bcm5719-llvm-2e0f6c9b2141df80bef932ecbaae182d70c5a844.tar.gz bcm5719-llvm-2e0f6c9b2141df80bef932ecbaae182d70c5a844.zip | |
[X86][SSE] Reduce instruction/register usages for v4i32 vector shifts (PR37441)
As suggested by Fabian on PR37441, use PSHUFLW to extend shift amount types for use with PSRAD/PSRLD to reduce register pressure.
Some of this ideally would be done by combineTargetShuffle but its tricky to do as most of the shuffles are sharing inputs.
Differential Revision: https://reviews.llvm.org/D46959
llvm-svn: 332524
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/expression_command/call-function')
0 files changed, 0 insertions, 0 deletions
