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| author | Sanjay Patel <spatel@rotateright.com> | 2017-08-15 18:25:52 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-08-15 18:25:52 +0000 |
| commit | f69b7d5c930e839de3dedf4bb56c03068946f3f5 (patch) | |
| tree | 28d515a0031c7c25bf36dd1249f74f3b247c0ccf /compiler-rt | |
| parent | bb30377c5a8e81a6a6f851bc5067ca188919b2d0 (diff) | |
| download | bcm5719-llvm-f69b7d5c930e839de3dedf4bb56c03068946f3f5.tar.gz bcm5719-llvm-f69b7d5c930e839de3dedf4bb56c03068946f3f5.zip | |
[InstCombine] sink sext after ashr
Narrow ops are better for bit-tracking, and in the case of vectors,
may enable better codegen.
As the trunc test shows, this can allow follow-on simplifications.
There's a block of code in visitTrunc that deals with shifted ops
with FIXME comments. It may be possible to remove some of that now,
but I want to make sure there are no problems with this step first.
http://rise4fun.com/Alive/Y3a
Name: hoist_ashr_ahead_of_sext_1
%s = sext i8 %x to i32
%r = ashr i32 %s, 3 ; shift value is < than source bit width
=>
%a = ashr i8 %x, 3
%r = sext i8 %a to i32
Name: hoist_ashr_ahead_of_sext_2
%s = sext i8 %x to i32
%r = ashr i32 %s, 8 ; shift value is >= than source bit width
=>
%a = ashr i8 %x, 7 ; so clamp this shift value
%r = sext i8 %a to i32
Name: junc_the_trunc
%a = sext i16 %v to i32
%s = ashr i32 %a, 18
%t = trunc i32 %s to i16
=>
%t = ashr i16 %v, 15
llvm-svn: 310942
Diffstat (limited to 'compiler-rt')
0 files changed, 0 insertions, 0 deletions

