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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2013-08-21 13:28:02 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2013-08-21 13:28:02 +0000 |
| commit | 0221d8636e751f4abd2cd20e0cf52033008014c7 (patch) | |
| tree | 79c55388614a509a1ff3bf9e84bb73cc883beca1 /clang | |
| parent | ae1112bae540972b6c663eb900333f8a677ce5a6 (diff) | |
| download | bcm5719-llvm-0221d8636e751f4abd2cd20e0cf52033008014c7.tar.gz bcm5719-llvm-0221d8636e751f4abd2cd20e0cf52033008014c7.zip | |
Don't disable SSE4A when disabling AVX.
Thanks for Craig Topper for noticing it.
llvm-svn: 188902
Diffstat (limited to 'clang')
| -rw-r--r-- | clang/lib/Basic/Targets.cpp | 2 | ||||
| -rw-r--r-- | clang/test/Preprocessor/x86_target_features.c | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp index d5392fb2384..e2898cc86b5 100644 --- a/clang/lib/Basic/Targets.cpp +++ b/clang/lib/Basic/Targets.cpp @@ -2120,7 +2120,7 @@ void X86TargetInfo::setSSELevel(llvm::StringMap<bool> &Features, Features["popcnt"] = Features["sse42"] = false; case AVX: Features["fma"] = Features["avx"] = false; - setXOPLevel(Features, SSE4A, false); + setXOPLevel(Features, FMA4, false); case AVX2: Features["avx2"] = false; case AVX512F: diff --git a/clang/test/Preprocessor/x86_target_features.c b/clang/test/Preprocessor/x86_target_features.c index 4cdd3425cc9..7d6a6d8a7c0 100644 --- a/clang/test/Preprocessor/x86_target_features.c +++ b/clang/test/Preprocessor/x86_target_features.c @@ -42,3 +42,16 @@ // AVX: #define __SSE_MATH__ 1 // AVX: #define __SSE__ 1 // AVX: #define __SSSE3__ 1 + + +// RUN: %clang -target i386-unknown-unknown -march=pentium-m -mxop -mno-avx -x c -E -dM -o - %s | FileCheck --check-prefix=SSE4A %s + +// SSE4A: #define __SSE2_MATH__ 1 +// SSE4A: #define __SSE2__ 1 +// SSE4A: #define __SSE3__ 1 +// SSE4A: #define __SSE4A__ 1 +// SSE4A: #define __SSE4_1__ 1 +// SSE4A: #define __SSE4_2__ 1 +// SSE4A: #define __SSE_MATH__ 1 +// SSE4A: #define __SSE__ 1 +// SSE4A: #define __SSSE3__ 1 |
