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| author | Michael Kruse <llvm@meinersbur.de> | 2018-12-20 21:24:54 +0000 |
|---|---|---|
| committer | Michael Kruse <llvm@meinersbur.de> | 2018-12-20 21:24:54 +0000 |
| commit | 0535137e4ad5fc76b19ec6118724f66023f565f7 (patch) | |
| tree | 450b4a084973a76d4b7237bc355664aa19dd9255 /clang/test/OpenMP/taskloop_simd_codegen.cpp | |
| parent | a6b9c68a85df16560c4a20a918321d0a847971cd (diff) | |
| download | bcm5719-llvm-0535137e4ad5fc76b19ec6118724f66023f565f7.tar.gz bcm5719-llvm-0535137e4ad5fc76b19ec6118724f66023f565f7.zip | |
[CodeGen] Generate llvm.loop.parallel_accesses instead of llvm.mem.parallel_loop_access metadata.
Instead of generating llvm.mem.parallel_loop_access metadata, generate
llvm.access.group on instructions and llvm.loop.parallel_accesses on
loops. There is one access group per generated loop.
This is clang part of D52116/r349725.
Differential Revision: https://reviews.llvm.org/D52117
llvm-svn: 349823
Diffstat (limited to 'clang/test/OpenMP/taskloop_simd_codegen.cpp')
| -rw-r--r-- | clang/test/OpenMP/taskloop_simd_codegen.cpp | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/clang/test/OpenMP/taskloop_simd_codegen.cpp b/clang/test/OpenMP/taskloop_simd_codegen.cpp index 4da4eb85f48..4c84eccb4f8 100644 --- a/clang/test/OpenMP/taskloop_simd_codegen.cpp +++ b/clang/test/OpenMP/taskloop_simd_codegen.cpp @@ -83,17 +83,17 @@ int main(int argc, char **argv) { // CHECK: [[LB_I32:%.+]] = trunc i64 [[LB_VAL]] to i32 // CHECK: store i32 [[LB_I32]], i32* [[CNT:%.+]], // CHECK: br label -// CHECK: [[VAL:%.+]] = load i32, i32* [[CNT]],{{.*}}!llvm.mem.parallel_loop_access [[LOOP1:!.+]] +// CHECK: [[VAL:%.+]] = load i32, i32* [[CNT]],{{.*}}!llvm.access.group // CHECK: [[VAL_I64:%.+]] = sext i32 [[VAL]] to i64 -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],{{.*}}!llvm.mem.parallel_loop_access [[LOOP1]] +// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],{{.*}}!llvm.access.group // CHECK: [[CMP:%.+]] = icmp ule i64 [[VAL_I64]], [[UB_VAL]] // CHECK: br i1 [[CMP]], label %{{.+}}, label %{{.+}} -// CHECK: load i32, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP1]] -// CHECK: store i32 %{{.*}}!llvm.mem.parallel_loop_access [[LOOP1]] -// CHECK: load i32, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP1]] +// CHECK: load i32, i32* %{{.*}}!llvm.access.group +// CHECK: store i32 %{{.*}}!llvm.access.group +// CHECK: load i32, i32* %{{.*}}!llvm.access.group // CHECK: add nsw i32 %{{.+}}, 1 -// CHECK: store i32 %{{.+}}, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP1]] -// CHECK: br label %{{.*}}!llvm.loop [[LOOP1]] +// CHECK: store i32 %{{.+}}, i32* %{{.*}}!llvm.access.group +// CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 // CHECK: define internal i32 [[TASK2]]( @@ -113,17 +113,17 @@ int main(int argc, char **argv) { // CHECK: [[LB_I32:%.+]] = trunc i64 [[LB_VAL]] to i32 // CHECK: store i32 [[LB_I32]], i32* [[CNT:%.+]], // CHECK: br label -// CHECK: [[VAL:%.+]] = load i32, i32* [[CNT]],{{.*}}!llvm.mem.parallel_loop_access [[LOOP2:!.+]] +// CHECK: [[VAL:%.+]] = load i32, i32* [[CNT]],{{.*}}!llvm.access.group // CHECK: [[VAL_I64:%.+]] = sext i32 [[VAL]] to i64 -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],{{.*}}!llvm.mem.parallel_loop_access [[LOOP2]] +// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],{{.*}}!llvm.access.group // CHECK: [[CMP:%.+]] = icmp ule i64 [[VAL_I64]], [[UB_VAL]] // CHECK: br i1 [[CMP]], label %{{.+}}, label %{{.+}} -// CHECK: load i32, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP2]] -// CHECK: store i32 %{{.*}}!llvm.mem.parallel_loop_access [[LOOP2]] -// CHECK: load i32, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP2]] +// CHECK: load i32, i32* %{{.*}}!llvm.access.group +// CHECK: store i32 %{{.*}}!llvm.access.group +// CHECK: load i32, i32* %{{.*}}!llvm.access.group // CHECK: add nsw i32 %{{.+}}, 1 -// CHECK: store i32 %{{.+}}, i32* %{{.*}}!llvm.mem.parallel_loop_access [[LOOP2]] -// CHECK: br label %{{.*}}!llvm.loop [[LOOP2]] +// CHECK: store i32 %{{.+}}, i32* %{{.*}}!llvm.access.group +// CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 // CHECK: define internal i32 [[TASK3]]( @@ -142,7 +142,7 @@ int main(int argc, char **argv) { // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], // CHECK: store i64 [[LB_VAL]], i64* [[CNT:%.+]], // CHECK: br label -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 @@ -192,14 +192,14 @@ struct S { // CHECK: [[CMP:%.+]] = icmp ule i64 [[VAL_I64]], [[UB_VAL]] // CHECK: br i1 [[CMP]], label %{{.+}}, label %{{.+}} // CHECK: load i32, i32* % -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group // CHECK: store i32 % -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group // CHECK: load i32, i32* % -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group // CHECK: add nsw i32 %{{.+}}, 1 // CHECK: store i32 %{{.+}}, i32* % -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group // CHECK: br label %{{.*}}!llvm.loop // CHECK: ret i32 0 |
