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| author | Michael Kruse <llvm@meinersbur.de> | 2018-12-20 21:24:54 +0000 |
|---|---|---|
| committer | Michael Kruse <llvm@meinersbur.de> | 2018-12-20 21:24:54 +0000 |
| commit | 0535137e4ad5fc76b19ec6118724f66023f565f7 (patch) | |
| tree | 450b4a084973a76d4b7237bc355664aa19dd9255 /clang/test/OpenMP/for_codegen.cpp | |
| parent | a6b9c68a85df16560c4a20a918321d0a847971cd (diff) | |
| download | bcm5719-llvm-0535137e4ad5fc76b19ec6118724f66023f565f7.tar.gz bcm5719-llvm-0535137e4ad5fc76b19ec6118724f66023f565f7.zip | |
[CodeGen] Generate llvm.loop.parallel_accesses instead of llvm.mem.parallel_loop_access metadata.
Instead of generating llvm.mem.parallel_loop_access metadata, generate
llvm.access.group on instructions and llvm.loop.parallel_accesses on
loops. There is one access group per generated loop.
This is clang part of D52116/r349725.
Differential Revision: https://reviews.llvm.org/D52117
llvm-svn: 349823
Diffstat (limited to 'clang/test/OpenMP/for_codegen.cpp')
| -rw-r--r-- | clang/test/OpenMP/for_codegen.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/clang/test/OpenMP/for_codegen.cpp b/clang/test/OpenMP/for_codegen.cpp index 364b9f12ea5..aab6606d7ae 100644 --- a/clang/test/OpenMP/for_codegen.cpp +++ b/clang/test/OpenMP/for_codegen.cpp @@ -73,7 +73,7 @@ void without_schedule_clause(float *a, float *b, float *c, float *d) { // ... loop body ... // End of body: store into a[i]: // CHECK: store float [[RESULT:%.+]], float* {{%.+}} -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 @@ -114,7 +114,7 @@ void static_not_chunked(float *a, float *b, float *c, float *d) { // ... loop body ... // End of body: store into a[i]: // CHECK: store float [[RESULT:%.+]], float* {{%.+}} -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 @@ -163,7 +163,7 @@ void static_chunked(float *a, float *b, float *c, float *d) { // ... loop body ... // End of body: store into a[i]: // CHECK: store float [[RESULT:%.+]], float* {{%.+}} -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add i32 [[IV1_2]], 1 @@ -215,7 +215,7 @@ void dynamic1(float *a, float *b, float *c, float *d) { // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] // ... loop body ... // End of body: store into a[i]: -// CHECK: store float [[RESULT:%.+]], float* {{%.+}}!llvm.mem.parallel_loop_access +// CHECK: store float [[RESULT:%.+]], float* {{%.+}}!llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 @@ -256,7 +256,7 @@ void guided7(float *a, float *b, float *c, float *d) { // CHECK-NEXT: store i64 [[CALC_I_2]], i64* [[LC_I:.+]] // ... loop body ... // End of body: store into a[i]: -// CHECK: store float [[RESULT:%.+]], float* {{%.+}}!llvm.mem.parallel_loop_access +// CHECK: store float [[RESULT:%.+]], float* {{%.+}}!llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add i64 [[IV1_2]], 1 @@ -301,7 +301,7 @@ void test_auto(float *a, float *b, float *c, float *d) { // ... loop body ... // End of body: store into a[i]: // CHECK: store float [[RESULT:%.+]], float* {{%.+}} -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i64 [[IV1_2]], 1 @@ -343,7 +343,7 @@ void runtime(float *a, float *b, float *c, float *d) { // ... loop body ... // End of body: store into a[i]: // CHECK: store float [[RESULT:%.+]], float* {{%.+}} -// CHECK-NOT: !llvm.mem.parallel_loop_access +// CHECK-NOT: !llvm.access.group a[i] = b[i] * c[i] * d[i]; // CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 |
