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authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>2016-10-26 19:27:11 +0000
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>2016-10-26 19:27:11 +0000
commit3de0a385c96fa94dd7ed3c1df8b10dd65cf738c8 (patch)
treea21f0365d9f130006f4e8375e4a91e7fc2d17129 /clang/test/CodeGen/builtins-ppc-p9vector.c
parent01969218a4c33884460ac911cca3280bb184a344 (diff)
downloadbcm5719-llvm-3de0a385c96fa94dd7ed3c1df8b10dd65cf738c8.tar.gz
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[PowerPC] Implement vector_insert_exp builtins - clang portion
This patch corresponds to review https://reviews.llvm.org/D25956. Committing on behalf of Zaara Syeda. llvm-svn: 285229
Diffstat (limited to 'clang/test/CodeGen/builtins-ppc-p9vector.c')
-rw-r--r--clang/test/CodeGen/builtins-ppc-p9vector.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/clang/test/CodeGen/builtins-ppc-p9vector.c b/clang/test/CodeGen/builtins-ppc-p9vector.c
index 44562c519b0..8f7f48cc593 100644
--- a/clang/test/CodeGen/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/builtins-ppc-p9vector.c
@@ -698,3 +698,31 @@ vector unsigned short test54(void) {
// CHECK-NEXT: ret <8 x i16>
return vec_popcnt (vusa);
}
+vector double test55(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+ return vec_insert_exp (vda,vulb);
+}
+vector double test56(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-BE-NEXT: ret <2 x double>
+// CHECK: @llvm.ppc.vsx.xviexpdp(<2 x i64> %{{.+}}, <2 x i64>
+// CHECK-NEXT: ret <2 x double>
+ return vec_insert_exp (vula, vulb);
+}
+vector float test57(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+ return vec_insert_exp (vfa,vuib);
+}
+vector float test58(void) {
+// CHECK-BE: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-BE-NEXT: ret <4 x float>
+// CHECK: @llvm.ppc.vsx.xviexpsp(<4 x i32> %{{.+}}, <4 x i32>
+// CHECK-NEXT: ret <4 x float>
+ return vec_insert_exp (vuia,vuib);
+}
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