[PPC] add extract sig/exp test data class for vec float and vec double.

 Add vector extract exponent/significand functions to altivec.h, as well as
 functions (and related constants) to test the data class of vector float
 and vector double.

 Differential Revision: https://reviews.llvm.org/D26271

llvm-svn: 286830

1 files changed, 42 insertions, 0 deletions

diff --git a/clang/test/CodeGen/builtins-ppc-p9vector.c b/clang/test/CodeGen/builtins-ppc-p9vector.c
index 5e942a38f67..c14ad71ea5e 100644
--- a/clang/test/CodeGen/builtins-ppc-p9vector.c
+++ b/clang/test/CodeGen/builtins-ppc-p9vector.c
@@ -925,3 +925,45 @@ vector double test81(void) {
   // CHECK-LE: insertelement <4 x float>
   return vec_pack(vda, vdb);
 }
+vector unsigned int test82(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}})
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.vsx.xvxexpsp(<4 x float> {{.+}})
+// CHECK-NEXT: ret <4 x i32>
+  return vec_extract_exp(vfa);
+}
+vector unsigned long long test83(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}})
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.vsx.xvxexpdp(<2 x double> {{.+}})
+// CHECK-NEXT: ret <2 x i64>
+  return vec_extract_exp(vda);
+}
+vector unsigned int test84(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}})
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.vsx.xvxsigsp(<4 x float> {{.+}})
+// CHECK-NEXT: ret <4 x i32>
+  return vec_extract_sig(vfa);
+}
+vector unsigned long long test85(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}})
+// CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: @llvm.ppc.vsx.xvxsigdp(<2 x double> {{.+}})
+// CHECK-NEXT: ret <2 x i64>
+  return vec_extract_sig(vda);
+}
+vector bool int test86(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127)
+// CHECK-BE-NEXT: ret <4 x i32>
+// CHECK: @llvm.ppc.vsx.xvtstdcsp(<4 x float> {{.+}}, i32 127)
+// CHECK-NEXT: ret <4 x i32>
+   return vec_test_data_class(vfa, __VEC_CLASS_FP_NOT_NORMAL);
+}
+vector bool long long test87(void) {
+// CHECK-BE: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127)
+// CHECK-BE_NEXT: ret <2 x i64
+// CHECK: @llvm.ppc.vsx.xvtstdcdp(<2 x double> {{.+}}, i32 127)
+// CHECK-NEXT: ret <2 x i64>
+  return vec_test_data_class(vda, __VEC_CLASS_FP_NOT_NORMAL);
+}