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| author | Tim Northover <tnorthover@apple.com> | 2014-03-29 15:09:45 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-29 15:09:45 +0000 |
| commit | a2ee433c8d99632419d4a13a66cc4d06eada4014 (patch) | |
| tree | e6ab2db8facbc4c5ed2fb11df260db8138572ace /clang/test/CodeGen/arm64_vset_lane.c | |
| parent | af3698066a1ea2e5ab4cc08ae9a59620cf18adb7 (diff) | |
| download | bcm5719-llvm-a2ee433c8d99632419d4a13a66cc4d06eada4014.tar.gz bcm5719-llvm-a2ee433c8d99632419d4a13a66cc4d06eada4014.zip | |
ARM64: initial clang support commit.
This adds Clang support for the ARM64 backend. There are definitely
still some rough edges, so please bring up any issues you see with
this patch.
As with the LLVM commit though, we think it'll be more useful for
merging with AArch64 from within the tree.
llvm-svn: 205100
Diffstat (limited to 'clang/test/CodeGen/arm64_vset_lane.c')
| -rw-r--r-- | clang/test/CodeGen/arm64_vset_lane.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/clang/test/CodeGen/arm64_vset_lane.c b/clang/test/CodeGen/arm64_vset_lane.c new file mode 100644 index 00000000000..c2acc4cd783 --- /dev/null +++ b/clang/test/CodeGen/arm64_vset_lane.c @@ -0,0 +1,31 @@ +// RUN: %clang -O1 -target arm64-apple-ios7 -ffreestanding -S -o - -emit-llvm %s | FileCheck %s +// Test ARM64 SIMD set lane intrinsics INCOMPLETE + +#include <arm_neon.h> + +float16x4_t test_vset_lane_f16(float16_t *a1, float16x4_t a2) { + // CHECK-LABEL: test_vset_lane_f16 + return vset_lane_f16(*a1, a2, 1); + // CHECK insertelement <4 x i16> %a2, i16 %a1, i32 1 +} + +float16x8_t test_vsetq_lane_f16(float16_t *a1, float16x8_t a2) { + // CHECK-LABEL: test_vsetq_lane_f16 + return vsetq_lane_f16(*a1, a2, 4); + // CHECK insertelement <8 x i16> %a2, i16 %a1, i32 4 +} + +// problem with scalar_to_vector in backend. Punt for now +#if 0 +float64x1_t test_vset_lane_f64(float64_t a1, float64x1_t a2) { + // CHECK-LABEL@ test_vset_lane_f64 + return vset_lane_f64(a1, a2, 0); + // CHECK@ @llvm.arm64.neon.smaxv.i32.v8i8 +} +#endif + +float64x2_t test_vsetq_lane_f64(float64_t a1, float64x2_t a2) { + // CHECK-LABEL: test_vsetq_lane_f64 + return vsetq_lane_f64(a1, a2, 0); + // CHECK insertelement <2 x double> %a2, double %a1, i32 0 +} |

