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author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-09-10 01:42:28 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-09-10 01:42:28 +0000 |
commit | b8886b517d417f14951e8d0dc6f00aef85638c34 (patch) | |
tree | ab61734f33f7c9fdf409e9b3ba8bbf6881b3e3db /clang/lib/Serialization/GlobalModuleIndex.cpp | |
parent | 80f766a032fca529ddcb78d952ee882536223b3b (diff) | |
download | bcm5719-llvm-b8886b517d417f14951e8d0dc6f00aef85638c34.tar.gz bcm5719-llvm-b8886b517d417f14951e8d0dc6f00aef85638c34.zip |
[AArch64] Support selecting STNP.
We could go through the load/store optimizer and match STNP where
we would have matched a nontemporal-annotated STP, but that's not
reliable enough, as an opportunistic optimization.
Insetad, we can guarantee emitting STNP, by matching them at ISel.
Since there are no single-input nontemporal stores, we have to
resort to some high-bits-extracting trickery to generate an STNP
from a plain store.
Also, we need to support another, LDP/STP-specific addressing mode,
base + signed scaled 7-bit immediate offset.
For now, only match the base. Let's make it smart separately.
Part of PR24086.
llvm-svn: 247231
Diffstat (limited to 'clang/lib/Serialization/GlobalModuleIndex.cpp')
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