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| author | Craig Topper <craig.topper@intel.com> | 2018-04-05 20:04:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-05 20:04:06 +0000 |
| commit | c6bb36a3d026a53152ed1635c41dbfad3664ecd5 (patch) | |
| tree | f3c49e71e562c26ad669ed8808f964c68d8da95e /clang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 650fd6c31c99277e0b9c18a252a325001efa34f7 (diff) | |
| download | bcm5719-llvm-c6bb36a3d026a53152ed1635c41dbfad3664ecd5.tar.gz bcm5719-llvm-c6bb36a3d026a53152ed1635c41dbfad3664ecd5.zip | |
[X86] Remove some InstRWs for plain store instructions on Sandy Bridge.
We were forcing the latency of these instructions to 5 cycles, but every other scheduler model had them as 1 cycle. I'm sure I didn't get everything, but this gets a big portion.
llvm-svn: 329339
Diffstat (limited to 'clang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions
