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| author | Yaxun Liu <Yaxun.Liu@amd.com> | 2019-06-14 15:54:47 +0000 |
|---|---|---|
| committer | Yaxun Liu <Yaxun.Liu@amd.com> | 2019-06-14 15:54:47 +0000 |
| commit | cabce71845f442fdf5fde2459b94efae8aef241f (patch) | |
| tree | 52dd7928d64904da38efe12235ec1cc799a92737 /clang/lib/CodeGen/TargetInfo.cpp | |
| parent | 573ffd88a0e312c71fbeaaf781c569c9cb51e5e8 (diff) | |
| download | bcm5719-llvm-cabce71845f442fdf5fde2459b94efae8aef241f.tar.gz bcm5719-llvm-cabce71845f442fdf5fde2459b94efae8aef241f.zip | |
[AMDGPU] Enable the implicit arguments for HIP (CLANG)
Enable 48-bytes of implicit arguments for HIP as well. Earlier it was enabled for OpenCL. This code is specific to AMDGPU target.
Differential Revision: https://reviews.llvm.org/D62244
llvm-svn: 363414
Diffstat (limited to 'clang/lib/CodeGen/TargetInfo.cpp')
| -rw-r--r-- | clang/lib/CodeGen/TargetInfo.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index f39764d1a46..4ef57786f44 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -7868,7 +7868,8 @@ void AMDGPUTargetCodeGenInfo::setTargetAttributes( const auto *ReqdWGS = M.getLangOpts().OpenCL ? FD->getAttr<ReqdWorkGroupSizeAttr>() : nullptr; - if (M.getLangOpts().OpenCL && FD->hasAttr<OpenCLKernelAttr>() && + if (((M.getLangOpts().OpenCL && FD->hasAttr<OpenCLKernelAttr>()) || + (M.getLangOpts().HIP && FD->hasAttr<CUDAGlobalAttr>())) && (M.getTriple().getOS() == llvm::Triple::AMDHSA)) F->addFnAttr("amdgpu-implicitarg-num-bytes", "48"); |
