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| author | Javed Absar <javed.absar@arm.com> | 2019-04-26 21:08:11 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2019-04-26 21:08:11 +0000 |
| commit | 18b0c40bc5dbaf25157a838701b2aba8ba8440db (patch) | |
| tree | d95595bc82c87acf340ce94df9c8da068f3437cb /clang/lib/Basic/Targets/AArch64.cpp | |
| parent | b6661490b42f85b6e62591f202f6ac0efae206fc (diff) | |
| download | bcm5719-llvm-18b0c40bc5dbaf25157a838701b2aba8ba8440db.tar.gz bcm5719-llvm-18b0c40bc5dbaf25157a838701b2aba8ba8440db.zip | |
[AArch64] Add support for MTE intrinsics
This provides intrinsics support for Memory Tagging Extension (MTE),
which was introduced with the Armv8.5-a architecture.
These intrinsics are available when __ARM_FEATURE_MEMORY_TAGGING is defined.
Each intrinsic is described in detail in the ACLE Q1 2019 documentation:
https://developer.arm.com/docs/101028/latest
Reviewed By: Tim Nortover, David Spickett
Differential Revision: https://reviews.llvm.org/D60485
llvm-svn: 359348
Diffstat (limited to 'clang/lib/Basic/Targets/AArch64.cpp')
| -rw-r--r-- | clang/lib/Basic/Targets/AArch64.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index a0885a69819..3dd94a6a0c3 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -194,6 +194,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, if (HasDotProd) Builder.defineMacro("__ARM_FEATURE_DOTPROD", "1"); + if (HasMTE) + Builder.defineMacro("__ARM_FEATURE_MEMORY_TAGGING", "1"); + if ((FPU & NeonMode) && HasFP16FML) Builder.defineMacro("__ARM_FEATURE_FP16FML", "1"); @@ -258,6 +261,8 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features, HasDotProd = 1; if (Feature == "+fp16fml") HasFP16FML = 1; + if (Feature == "+mte") + HasMTE = 1; } setDataLayout(); |
