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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-01 15:30:02 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-02-01 15:30:02 +0000 |
| commit | eb50b6d06039ae26c2a87c0f3446c061892c4a5e (patch) | |
| tree | f12d77bcd2ababdc314f47ddc4568f101340cfc1 | |
| parent | 5d8babe30d6bcca6900811be97ec746a92b570b5 (diff) | |
| download | bcm5719-llvm-eb50b6d06039ae26c2a87c0f3446c061892c4a5e.tar.gz bcm5719-llvm-eb50b6d06039ae26c2a87c0f3446c061892c4a5e.zip | |
[X86][SSE] Add PR26491 horizontal add test
llvm-svn: 323973
| -rw-r--r-- | llvm/test/CodeGen/X86/haddsub-3.ll | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/haddsub-3.ll b/llvm/test/CodeGen/X86/haddsub-3.ll new file mode 100644 index 00000000000..a9206da5fe1 --- /dev/null +++ b/llvm/test/CodeGen/X86/haddsub-3.ll @@ -0,0 +1,39 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX + +define float @pr26491(<4 x float> %a0) { +; SSE2-LABEL: pr26491: +; SSE2: # %bb.0: +; SSE2-NEXT: movaps %xmm0, %xmm1 +; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,3,3] +; SSE2-NEXT: addps %xmm0, %xmm1 +; SSE2-NEXT: movaps %xmm1, %xmm0 +; SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] +; SSE2-NEXT: addss %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSSE3-LABEL: pr26491: +; SSSE3: # %bb.0: +; SSSE3-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; SSSE3-NEXT: addps %xmm0, %xmm1 +; SSSE3-NEXT: movaps %xmm1, %xmm0 +; SSSE3-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1] +; SSSE3-NEXT: addss %xmm1, %xmm0 +; SSSE3-NEXT: retq +; +; AVX-LABEL: pr26491: +; AVX: # %bb.0: +; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3] +; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0 +; AVX-NEXT: vpermilpd {{.*#+}} xmm1 = xmm0[1,0] +; AVX-NEXT: vaddss %xmm0, %xmm1, %xmm0 +; AVX-NEXT: retq + %1 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3> + %2 = fadd <4 x float> %1, %a0 + %3 = extractelement <4 x float> %2, i32 2 + %4 = extractelement <4 x float> %2, i32 0 + %5 = fadd float %3, %4 + ret float %5 +} |
